The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
上傳時(shí)間： 2013-11-16
上傳用戶：浩子GG
The CAT25128 is a 128−Kb Serial CMOS EEPROM device internally organized as 16Kx8 bits. This features a 64−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25128 device. The device featuressoftware and hardware write protection, including partial as well as full array protection.
標(biāo)簽： 25128 EEPRO CMOS CAT
上傳時(shí)間： 2013-11-15
上傳用戶：fklinran
The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.
標(biāo)簽： 4channel multiple 9544A 9544
上傳時(shí)間： 2014-12-28
上傳用戶：潛水的三貢
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上傳時(shí)間： 2013-11-13
上傳用戶：fredguo
Although Stellaris microcontrollers have generous internal SRAM capabilities, certain applicationsmay have data storage requirements that exceed the 8 KB limit of the Stellaris LM3S8xx seriesdevices. Since microcontrollers do not have an external parallel data-bus, serial memory optionsmust be considered. Until recently, the ubiquitous serial EEPROM/flash device was the only serialmemory solution. The major limitations of EEPROM and flash technology are slow write speed, slowerase times, and limited write/erase endurance.Recently, serial SRAM devices have become available as a solution for high-speed dataapplications. The N256S08xxHDA series of devices, from AMI Semiconductor, offer 32 K x 8 bits oflow-power data storage, a fast Serial Peripheral Interface (SPI) serial bus, and unlimited write cycles.The parts are available in 8-pin SOIC and compact TSSOP packages.
標(biāo)簽： Adding Serial SRAM 32
上傳時(shí)間： 2013-10-14
上傳用戶：cxl274287265
Designing Boards with Atmel AT89C51, AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test:Recent improvements in chips andtesters have made it possible for thetester to begin taking over the role traditionallyassigned to the PROM programmer.Instead of having a PROM programmerwrite nonvolatile memoriesbefore assembling the board, the in-circuittester writes them during in-circuittesting operations. Many Teradyne Z18-series testers are now in use loadingcode into nonvolatile memories, microcontrollersand in-circuit programmable logic devices. The purpose of this note is to explain how the Z18 approaches the writing task for Atmel AT89C series IC’s,so that designers of boards using these chips can get the best results.
標(biāo)簽： Designing Boards Atmel with
上傳時(shí)間： 2013-11-20
上傳用戶：lijianyu172
基于單片機(jī)的LED漢字顯示屏設(shè)計(jì)與制作：在大型商場、車站、碼頭、地鐵站以及各類辦事窗口等越來越多的場所需要用LED點(diǎn)陣顯示圖形和漢字。LED行業(yè)已成為一個(gè)快速發(fā)展的新興產(chǎn)業(yè)，市場空間巨大，前景廣闊。隨著信息產(chǎn)業(yè)的高速發(fā)展，LED顯示作為信息傳播的一種重要手段，已廣泛應(yīng)用于室內(nèi)外需要進(jìn)行服務(wù)內(nèi)容和服務(wù)宗旨宣傳的公眾場所，例如戶內(nèi)外公共場所廣告宣傳、機(jī)場車站旅客引導(dǎo)信息、公交車輛報(bào)站系統(tǒng)、證券與銀行信息顯示、餐館報(bào)價(jià)信息豆示、高速公路可變情報(bào)板、體育場館比賽轉(zhuǎn)播、樓宇燈飾、交通信號(hào)燈、景觀照明等。顯然，LED顯示已成為城市亮化、現(xiàn)代化和信息化社會(huì)的一個(gè)重要標(biāo)志。 本文基于單片機(jī)(AT89C51)講述了16×16 LED漢字點(diǎn)陣顯示的基本原理、硬件組成與設(shè)計(jì)、程序編譯與下載等基本環(huán)節(jié)和相關(guān)技術(shù)。2 硬件電路組成及工作原理本產(chǎn)品擬采用以AT89C51單片機(jī)為核心芯片的電路來實(shí)現(xiàn)，主要由AT89C51芯片、時(shí)鐘電路、復(fù)位電路、列掃描驅(qū)動(dòng)電路(74HC154)、16×16 LED點(diǎn)陣5部分組成，如圖1所示。 其中，AT89C51是一種帶4 kB閃爍可編程可擦除只讀存儲(chǔ)器(Falsh Programmable and Erasable Read OnlyMemory，F(xiàn)PEROM)的低電壓、高性能CMOS型8位微處理器，俗稱單片機(jī)。該器件采用ATMEL高密度非易失存儲(chǔ)器制造技術(shù)制造，與工業(yè)標(biāo)準(zhǔn)的MCS-51指令集和輸出管腳相兼容。由于將多功能8位CPU和閃爍存儲(chǔ)器組合在單個(gè)芯片中，能夠進(jìn)行1 000次寫／擦循環(huán)，數(shù)據(jù)保留時(shí)間為10年。他是一種高效微控制器，為很多嵌入式控制系統(tǒng)提供了一種靈活性高且價(jià)廉的方案。因此，在智能化電子設(shè)計(jì)與制作過程中經(jīng)常用到AT89C51芯片。時(shí)鐘電路由AT89C51的18，19腳的時(shí)鐘端(XTALl及XTAL2)以及12 MHz晶振X1、電容C2，C3組成，采用片內(nèi)振蕩方式。復(fù)位電路采用簡易的上電復(fù)位電路，主要由電阻R1，R2，電容C1，開關(guān)K1組成，分別接至AT89C51的RST復(fù)位輸入端。LED點(diǎn)陣顯示屏采用16×16共256個(gè)象素的點(diǎn)陣，通過萬用表檢測發(fā)光二極管的方法測試判斷出該點(diǎn)陣的引腳分布，如圖2所示。 我們把行列總線接在單片機(jī)的IO口，然后把上面分析到的掃描代碼送人總線，就可以得到顯示的漢字了。但是若將LED點(diǎn)陣的行列端口全部直接接入89S51單片機(jī)，則需要使用32條IO口，這樣會(huì)造成IO資源的耗盡，系統(tǒng)也再無擴(kuò)充的余地。因此，我們?cè)趯?shí)際應(yīng)用中只是將LED點(diǎn)陣的16條行線直接接在P0口和P2口，至于列選掃描信號(hào)則是由4-16線譯碼器74HC154來選擇控制，這樣一來列選控制只使用了單片機(jī)的4個(gè)IO口，節(jié)約了很多IO資源，為單片機(jī)系統(tǒng)擴(kuò)充使用功能提供了條件。考慮到P0口必需設(shè)置上拉電阻，我們采用4.7 kΩ排電阻作為上拉電阻。
標(biāo)簽： LED 單片機(jī) 漢字 顯示屏設(shè)計(jì)
上傳時(shí)間： 2013-10-16
上傳用戶：ywcftc277
This application note shows how to write an Inter Integrated Circuit bus driver (I²C) for the Philips P90CL301micro-controller.It is not only an example of writing a driver, but it also includes a set of application interface software routines toquickly implement a complete I²C multi-master system application.For specific applications the user will have to make minimal changes in the driver program. Using the drivermeans linking modules to your application software and including a header-file into the application sourceprograms. A small example program of how to use the driver is listed.The driver supports i.a. polled or interrupt driven message handling, slave message transfers and multi-mastersystem applications. Furthermore, it is made suitable for use in conjunction with real time operating systems, likepSOS+.
標(biāo)簽： routines driver P90 301
上傳時(shí)間： 2013-11-23
上傳用戶：weixiao99
This application note demonstrates how to write an Inter Integrated Circuit bus driver (I2C) for the XA-S3 16-bitMicrocontroller from Philips Semiconductors.Not only the driver software is given. This note also contains a set of (example) interface routines and a smalldemo application program. All together it offers the user a quick start in writing a complete I2C system applicationwith the PXAS3x.The driver routines support interrupt driven single master transfers. Furthermore, the routines are suitable foruse in conjunction with real time operating systems.
標(biāo)簽： software driver XA-S I2C
上傳時(shí)間： 2013-11-02
上傳用戶：zw380105939
The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.
上傳時(shí)間： 2013-10-21
上傳用戶：xiaozhiqban
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