This document outlines what is necessary to install and run the LEACH protocol on version 2.27 of ns2. At the time of this writing, this is the newest version of ns2. The LEACH implementation was written as a stand-alone application. Thus, in the past a version compiled for LEACH may or may not work for other protocols. In addition, the original version of LEACH was compiled for version 2.5b which is an outdated version of ns2.
標(biāo)簽： necessary document outlines protocol
上傳時(shí)間： 2014-01-10
上傳用戶：tianjinfan
There are two files in the zip folder. bpsk_spread.m and jakesmodel.m Steps for simulation: 1] Run jakesmodel.m first 2] Then run bpsk_spread.m . 3] Note that during the first run bpsk_spread.m has no rayleigh fading.This is because the corresponding code has been commented 4] The resulting performance is stored in BER_awgn. 5] Now uncomment the Rayleigh Fading code in bpsk_spread.m file. 6] Same time comment BER_awgn (line 112) and uncomment BER_ray variable. 7] Run the simulation. To compare the perfromances of the receiver using DSSS plot the BER_awgn and BER_ray
標(biāo)簽： bpsk_spread jakesmodel simulation folder
上傳時(shí)間： 2016-05-19
上傳用戶：ynsnjs
Interactive smoothing for time-series signals, with sliders that allow you to adjust the smoothing parameters continuously while observing the effect on your signal dynamically. Run SmoothSliderTest to see how it works.
標(biāo)簽： smoothing Interactive time-series signals
上傳時(shí)間： 2014-12-07
上傳用戶：xinyuzhiqiwuwu
This experiment uses the Blackfi n BF533/BF537 EZ-KIT to run a simple FIR fi lter on stereo channels at a sampling frequency of 48 kHz. The CYCLE register is embedded in the main program ( process_data.c) to benchmark the time needed to process two FIR fi lters. A background telemetry channel (BTC) is set up to display the cycle count.
標(biāo)簽： experiment Blackfi EZ-KIT channe
上傳時(shí)間： 2013-12-27
上傳用戶：baiom
The running time of quicksort can be improved in practice by taking advantage of the fast running time of insertion sort when its input is “nearly” sorted. When quicksort is called on a subarray with fewer than k elements, let it simply return without sorting the subarray. After the top-level call to quicksort returns, run insertion sort on the entire array to finish the sorting process.
標(biāo)簽： running advantage quicksort improved
上傳時(shí)間： 2013-12-01
上傳用戶：梧桐
從時(shí)域分析比較了ofdm和stbc與ofdm結(jié)合的性能差別-from time-domain analysis and comparison of OFDM stbc OFDM combined wi
上傳時(shí)間： 2013-06-05
上傳用戶：caozhizhi
Run Pac-man Game Based on 8086/8088 FPGA IP Core
標(biāo)簽： Pac-man Based Game 8086
上傳時(shí)間： 2013-08-23
上傳用戶：JamesB
針對(duì)眾多低成本數(shù)據(jù)采集需求，采用帶有片上USB控制器和D/A轉(zhuǎn)換器的混合信號(hào)微處理器C8051F340，設(shè)計(jì)了一款可通過USB接口和LabVIEW圖形用戶界面實(shí)現(xiàn)與PC機(jī)聯(lián)機(jī)的數(shù)據(jù)采集器，同時(shí)借助系統(tǒng)的SD卡存儲(chǔ)獨(dú)立實(shí)現(xiàn)現(xiàn)場(chǎng)長(zhǎng)時(shí)間采集數(shù)據(jù)。該數(shù)據(jù)采集器成本低，結(jié)構(gòu)簡(jiǎn)單，體積小，已成功用于工業(yè)現(xiàn)場(chǎng)。 Abstract: Aiming at the need of low cost data acquisition, a data acquisition device is designed based on C8051F340 which is a mixed-signal microcontroller and integrates USB controller and A/D controller on a chip.The data acquisition device which can combine with PC by USB interface and LabVIEW graphical user interface,can realize data acquisition. At the same time,it can be solely run a long time in virtue of SD card in field.The date aequisition device features low cost,simple structure and little sharp, and it has been used in industry field.
標(biāo)簽： C8051F340 數(shù)據(jù) 集器設(shè)計(jì)
上傳時(shí)間： 2014-05-31
上傳用戶：1109003457
HT47R20A-1時(shí)基(Time Base)使用介紹 HT47 系列單片機(jī)的時(shí)基可提供一個(gè)周期性超時(shí)時(shí)間周期以產(chǎn)生規(guī)則性的內(nèi)部中斷。時(shí)基的時(shí)鐘來源可由掩膜選擇設(shè)定為WDT 時(shí)鐘、RTC 時(shí)鐘或指令時(shí)鐘（系統(tǒng)時(shí)鐘/4）；其超時(shí)時(shí)間范圍可由掩膜選擇設(shè)定為“時(shí)鐘來源”/212~“時(shí)鐘來源”/215。如果時(shí)基發(fā)生超時(shí)現(xiàn)象，則其對(duì)應(yīng)的中斷請(qǐng)求標(biāo)志（TBF）會(huì)被置位，如果中斷允許，則產(chǎn)生一個(gè)中斷服務(wù)到08H 的地址。
上傳時(shí)間： 2013-11-15
上傳用戶：13925096126
The use of the Wind River VxWorks Real-Time Operating System (RTOS) on Virtex™-4embedded PowerPC™ processors continues to be a popular choice for high performanceFPGA designs. The introduction of the Wind River Workbench design environment has enableda new and easier way for designers to control the configuration of the VxWorks kernel. Thisguide shows the steps required to build and configure a ML403 Embedded DevelopmentPlatform to boot and run the VxWorks RTOS. A VxWorks bootloader is created, programmedinto Flash, and used to boot the design. The concepts presented here can be scaled to anyPowerPC enabled development platform.
上傳時(shí)間： 2013-10-26
上傳用戶：agent
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