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  • XAPP806 -決定DDR反饋時(shí)鐘的最佳DCM相移

    This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is Running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be Run on a PowerPC® 405 or Microblaze™ microprocessor.

    標(biāo)簽: XAPP 806 DDR DCM

    上傳時(shí)間: 2013-10-15

    上傳用戶:euroford

  • 基于FPGA+DSP模式的智能相機(jī)設(shè)計(jì)

    針對(duì)嵌入式機(jī)器視覺系統(tǒng)向獨(dú)立化、智能化發(fā)展的要求,介紹了一種嵌入式視覺系統(tǒng)--智能相機(jī)。基于對(duì)智能相機(jī)體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析,對(duì)國內(nèi)外的幾款智能相機(jī)進(jìn)行比較。綜合技術(shù)發(fā)展現(xiàn)狀,提出基于FPGA+DSP模式的硬件平臺(tái),并提出智能相機(jī)的發(fā)展方向。分析結(jié)果表明,該系統(tǒng)設(shè)計(jì)可以實(shí)現(xiàn)脫離PC運(yùn)行,完成圖像獲取與分析,并作出相應(yīng)輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can Run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標(biāo)簽: FPGA DSP 模式 智能相機(jī)

    上傳時(shí)間: 2013-10-24

    上傳用戶:bvdragon

  • 多遠(yuǎn)程二極管溫度傳感器 (Design Considerat

    多遠(yuǎn)程二極管溫度傳感器-Design Considerations for pc thermal management Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PCB component count decreases when using a device that provides multiple inputs.Better temperature sensing improves product performance and reliability. Disk drive data integrity suffers at elevated temperatures. IBM published an article stating that a 5°C rise in operating temperature causes a 15% increase in the drive’s failure rate. The overall performance of a system can be improved by providing a more accurate temperature measurement of the most critical devices allowing them to Run just a few degrees hotter.The LM83 directly senses its own temperature and the temperature of three external PN junctions. One is dedicated to the CPU of choice, the other two go to other parts of your system that need thermal monitoring such as the disk drive or graphics chip. The SMBus-compatible LM83 supports SMBus timeout and logic levels. The LM83 has two interrupt outputs; one for user-programmable limits and WATCHDOG capability (INT), the other is a Critical Temperature Alarm output (T_CRIT_A) for system power supply shutdown.

    標(biāo)簽: Considerat Design 遠(yuǎn)程 二極管

    上傳時(shí)間: 2014-12-21

    上傳用戶:ljd123456

  • XAPP1023-測(cè)試Virtex-4 TEMAC系統(tǒng)的性能

    This application note provides step-by-step instructions on how to recreate a Tri-Mode Ethernet(TEMAC) performance testing system using the ML405 board and MontaVista Linux 4.0. Thisapplication note shows how to set up a simple EDK Base System Builder system on the ML405Evaluation Platform and Run performance tests. The network architecture for the test isdescribed. A system is built and downloaded into the FPGA. A MontaVista Linux kernel isconfigured, built, and downloaded into the ML405 Evaluation Platform. The instructions forobtaining and setting up the software used to perform the measurements, netperf, are given.

    標(biāo)簽: Virtex TEMAC XAPP 1023

    上傳時(shí)間: 2013-11-11

    上傳用戶:saharawalker

  • VxWorks6.x中的ML403嵌入式開發(fā)平臺(tái)

    The use of the Wind River VxWorks Real-Time Operating System (RTOS) on Virtex™-4embedded PowerPC™ processors continues to be a popular choice for high performanceFPGA designs. The introduction of the Wind River Workbench design environment has enableda new and easier way for designers to control the configuration of the VxWorks kernel. Thisguide shows the steps required to build and configure a ML403 Embedded DevelopmentPlatform to boot and Run the VxWorks RTOS. A VxWorks bootloader is created, programmedinto Flash, and used to boot the design. The concepts presented here can be scaled to anyPowerPC enabled development platform.

    標(biāo)簽: VxWorks 403 ML 嵌入式

    上傳時(shí)間: 2013-10-26

    上傳用戶:agent

  • 用MDK生成bin格式的可執(zhí)行文件

    用MDK 生成bin 文件1用MDK 生成bin 文件Embest 徐良平在RV MDK 中,默認(rèn)情況下生成*.hex 的可執(zhí)行文件,但是當(dāng)我們要生成*.bin 的可執(zhí)行文件時(shí)怎么辦呢?答案是可以使用RVCT 的fromelf.exe 工具進(jìn)行轉(zhuǎn)換。也就是說首先將源文件編譯鏈接成*.axf 的文件,然后使用fromelf.exe 工具將*.axf 格式的文件轉(zhuǎn)換成*.bin格式的文件。下面將具體說明這個(gè)操作步驟:1. 打開Axf_To_Bin 文件中的Axf_To_Bin.uv2 工程文件;2. 打開Options for Target ‘Axf_To_Bin’對(duì)話框,選擇User 標(biāo)簽頁;3. 構(gòu)選Run User Programs After Build/Rebuild 框中的Run #1 多選框,在后邊的文本框中輸入C:\Keil\ARM\BIN31\fromelf.exe --bin -o ./output/Axf_To_Bin.bin ./output/Axf_To_Bin.axf 命令行;4. 重新編譯文件,在./output/文件夾下生成了Axf_To_Bin.bin 文件。在上面的步驟中,有幾點(diǎn)值得注意的是:1. C:\Keil\ARM\BIN31\表示RV MDK 的安裝目錄;2. fromelf.exe 命令的具體語法格式如下:命令的格式為:fromelf [options] input_file命令選項(xiàng)如下:--help 顯示幫助信息--vsn 顯示版本信息--output file 輸出文件(默認(rèn)的輸出為文本格式)--nodebug 在生成的映象中不包含調(diào)試信息--nolinkview 在生成的映象中不包含段的信息二進(jìn)制輸出格式:--bin 生成Plain Binary 格式的文件--m32 生成Motorola 32 位十六進(jìn)制格式的文件--i32 生成Intel 32 位十六進(jìn)制格式的文件--vhx 面向字節(jié)的位十六進(jìn)制格式的文件t--base addr 設(shè)置m32,i32 格式文件的基地址--text 顯示文本信息文本信息的標(biāo)志-v 打印詳細(xì)信息-a 打印數(shù)據(jù)地址(針對(duì)帶調(diào)試信息的映象)-d 打印數(shù)據(jù)段的內(nèi)容-e 打印表達(dá)式表print exception tables-f 打印消除虛函數(shù)的信息-g 打印調(diào)試表print debug tables-r 打印重定位信息-s 打印字符表-t 打印字符串表-y 打印動(dòng)態(tài)段的內(nèi)容-z 打印代碼和數(shù)據(jù)大小的信息

    標(biāo)簽: MDK bin 可執(zhí)行文件

    上傳時(shí)間: 2013-12-17

    上傳用戶:AbuGe

  • MOTION BUILDER 使用說明書Ver.2

    MOTION BUILDER Ver.2 是用于監(jiān)控 KV-H20/H20S/H40S/H20G 的參數(shù)設(shè)定以及當(dāng)前動(dòng)作狀態(tài)的軟件。 在 PC 上可以設(shè)定復(fù)雜的參數(shù),并可以在顯示畫面上監(jiān)控正在運(yùn)行的 KV-H20/H20S/H40S/H20G。 關(guān)于 MOTION BUILDER Ver.2 概要、功能與使用方法的詳細(xì)說明。在安裝之前,請(qǐng)仔細(xì)閱讀本手冊(cè),并充分 理解。 注意 1、使用 MOTION BUILDER Ver.2 時(shí),必須在可以使用 KV-H20/H20S/H40S/H20G 上 連接的緊急停止開關(guān)的地方使用。 通訊異常時(shí),不接受 MOTION BUILDER Ver.2 的“強(qiáng)制停止”,可能會(huì)導(dǎo)致事故指示發(fā)生。發(fā)生通信異常時(shí),MOTION BUILDER Ver.2 的“強(qiáng)制停止”按鈕將不起作用。 2、JOG 過程中,不能采用斷開 PLC 的連接電纜等手段停止通訊。 KV-H20/H20S/H40S/H20G 單元的 JOG 繼電器會(huì)一直保持 ON,機(jī)器繼續(xù)運(yùn)轉(zhuǎn),并可能導(dǎo)致事故發(fā)生。 3、執(zhí)行監(jiān)控或者寫入?yún)?shù)(設(shè)定)時(shí),不能斷開和 PLC 的連接電纜。 否則會(huì)發(fā)生通訊錯(cuò)誤,PC 可能會(huì)被重啟。KV-H20/H20S/H40S/H20G 內(nèi)的數(shù)據(jù)可 能會(huì)損壞。 4、在 Run 過程中,KV-1000/700 進(jìn)行 JOG 示教時(shí),必須在 PROG 模式下實(shí)施。 如果掃描時(shí)間較長,則反映的時(shí)間變長,且可能發(fā)生無法預(yù)料的動(dòng)作。 5、發(fā)送到  KV-1000/700  的單元設(shè)定信息必須與當(dāng)前打開的梯形圖程序的單元設(shè)定信 息一致。如果設(shè)定信息不同,則顯示錯(cuò)誤,且不運(yùn)行。 6、錯(cuò)誤操作或者靜電等會(huì)引起數(shù)據(jù)變化或者去失,為了保護(hù)數(shù)據(jù),請(qǐng)定期進(jìn)行備份。 指示 關(guān)于數(shù)據(jù)的變化或者消失引起的損失,本公司不負(fù)任何責(zé)任,請(qǐng)諒解。 7、保存數(shù)據(jù)時(shí),如果需要保留原來保存的數(shù)據(jù),則選擇“重命名保存”。 如果“覆蓋保存”則會(huì)失去原來保存的數(shù)據(jù)。 運(yùn)行環(huán)境及系統(tǒng)配置 運(yùn)行 MOTION BUILDER Ver.2 ,必須具備如下環(huán)境。 請(qǐng)確認(rèn)您使用的系統(tǒng)是否符合如下條件、是否備齊了必需的設(shè)備。 對(duì)應(yīng)的 PC 機(jī)型 •  IBM PC 以及 PC/AT 兼容機(jī)(DOS/V) 系統(tǒng)配置 •  CPU Pentium 133 MHz 以上 支持 Windows 的打印 (推薦 Pentium 200 MHz 以上) •  內(nèi)存容量擴(kuò)展內(nèi)存  64MB 以上 •  硬盤可用空間  20MB 以上 •  CD-ROM 驅(qū)動(dòng)器 •  接口  RS-232C 或者 USB

    標(biāo)簽: BUILDER MOTION Ver 使用說明書

    上傳時(shí)間: 2013-10-08

    上傳用戶:fujiura

  • AD10以上版本的PCB Logo Creator

    AD10以上版本可能安裝的問題沒有這個(gè)PCB Logo Creator文件,無法加載LOGO,這個(gè)文件下載完放在AD安裝目錄下,然后打開軟件目錄DXP-Run script然后加載里面的文件就OK了!

    標(biāo)簽: Creator Logo PCB AD

    上傳時(shí)間: 2013-10-20

    上傳用戶:blacklee

  • 遠(yuǎn)程配置Nios II處理器應(yīng)用筆記

         通過以太網(wǎng)遠(yuǎn)程配置Nios II 處理器 應(yīng)用筆記 Firmware in embedded hardware systems is frequently updated over the Ethernet. For embedded systems that comprise a discrete microprocessor and the devices it controls, the firmware is the software image Run by the microprocessor. When the embedded system includes an FPGA, firmware updates include updates of the hardware image on the FPGA. If the FPGA includes a Nios® II soft processor, you can upgrade both the Nios II processor—as part of the FPGA image—and the software that the Nios II processor Runs, in a single remote configuration session.

    標(biāo)簽: Nios 遠(yuǎn)程 處理器 應(yīng)用筆記

    上傳時(shí)間: 2013-11-22

    上傳用戶:chaisz

  • XAPP806 -決定DDR反饋時(shí)鐘的最佳DCM相移

    This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is Running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be Run on a PowerPC® 405 or Microblaze™ microprocessor.

    標(biāo)簽: XAPP 806 DDR DCM

    上傳時(shí)間: 2014-11-26

    上傳用戶:erkuizhang

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