/*SPI規(guī)范：Data is always clocked into the device on the rising edge of SCK a-*/
/* nd clocked out of the device on the falling edge of SCK.All instruction-*/
/* s,addresses and data are transferred with the most significant bit(MSB) */
/* first.
The CAT25128 is a 128−Kb Serial CMOS EEPROM device internally organized as 16Kx8 bits. This features a 64−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25128 device. The device featuressoftware and hardware write protection, including partial as well as full array protection.
