SDRAM 參考設(shè)計(jì):主要包括The following figure shows a high-level block diagram for this reference design followed by a brief
description of each sub-section. The design consists of:
· PowerPC processor
· PLB-OPB bridge
· BlockRAM Memory Controller
· SDRAM Controller
· Two GPIO ports
· A UART Port
· External SDRAM
標(biāo)簽：
high-level
following
reference
diagram
上傳時(shí)間：
2013-12-15
上傳用戶：Miyuki
