I implement Dijkstra s Single Source Shortest Path, say SSP, algorithm for directed graphs using a simple data structure, say simple scheme, Fibonacci heaps, say F-heap scheme, and Pairing heaps, say P-heap scheme, and measure the relative performance of the three implementations.
標(biāo)簽： implement algorithm Dijkstra Shortest
上傳時間： 2014-01-01
上傳用戶：BIBI
GA for single machin problem
標(biāo)簽： problem single machin for
上傳時間： 2014-01-21
上傳用戶：dbs012280
GA2 for single Machin Problem
標(biāo)簽： Problem Machin single GA2
上傳時間： 2017-09-17
上傳用戶：希醬大魔王
GA3 for single machin problem
標(biāo)簽： problem single machin GA3
上傳時間： 2017-09-17
上傳用戶：金宜
The STi7200 is a new generation, high-definition set-top box/DVD decoder chip, and provides very high performance for low-cost HD systems. With enhanced performance over the STx7109, it includes both Windows Media Video 9 and H.264 video decoders for new, low bitrate applications. The STi7200 is able to decode two HD programs
標(biāo)簽： high-definition generation provides decoder
上傳時間： 2013-11-29
上傳用戶：xg262122
This is montecarlo cards game to choose pairs. I have developed using a single servlet. uncompress and deploy the application to a webserver like tomcat. java files also comressed with the war file.
標(biāo)簽： montecarlo uncompress developed servlet
上傳時間： 2017-09-20
上傳用戶：zhuyibin
Realtek chip monitor driver
標(biāo)簽： Realtek monitor driver chip
上傳時間： 2014-12-02
上傳用戶：xz85592677
single RHS Gauss-Jordan routine for Linear Equation
標(biāo)簽： Gauss-Jordan Equation routine single
上傳時間： 2013-11-28
上傳用戶：qq1604324866
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上傳時間： 2016-05-06
上傳用戶：fagong
QCA8228 Switch chip HDK
標(biāo)簽： Switch 8228 chip QCA HDK
上傳時間： 2017-10-25
上傳用戶：atherospaopao
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
