The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
上傳時間: 2014-01-24
上傳用戶:zl5712176
基于單片機的汽車多功能報警系統設計The Design of Automobile Multi-function AlarmingBased on Single Chip Computer劉法治趙明富寧睡達(河 南 科 技 學 院 ,新 鄉 453 00 3)摘要介紹了一種基于單片機控制的汽車多功能報警系統,它能對汽車的潤滑系統油壓、制動系統氣壓、冷卻系統溫度、輪胎欠壓及防盜進行自動檢測,并在發現異常情況時,發出聲光報警。闡述了該報警系統的硬件組成及軟件設計方法。關鍵詞單片機傳感器數模轉換報警Abstract Am ulti-fimctiona utomobilea larnungs ystemb asedo ns inglec hipc omputerco ntorlis in torducedin th isp aper.Th eo ilpr essuero flu bricatesystem, air pressure of braking system, temperature of cooling system, under pressure of tyre and guard against theft, detected automaticaly場thesystem. Audio and visual alarms wil be provided under abnormal conditions廠The hardware composition and software design of the system, described.Keywords Singlec hipc omputer Sensor Digital-t-oanaloguec onversion Alarmin 汽車多功能報苦器硬件系統設計根據 系 統 實際需要和產品性價比,選用ATMEL公司新生產的采用CMOs工藝的低功耗、高性能8位單片機AT89S52作為系統的控制器。AT89S52的片內有8k Bytes LSP Flash閃爍存儲器,可進行100(〕次寫、擦除操作;256Bytes內部數據存儲器(RAM);3 2 根可編程輸N輸出線;2個可編程全雙工串行通道;看門狗(WTD)電路等。系統由傳感器、單片機、模數轉換器、無線信號發射電路、指示燈驅動電路、聲光報警驅動電KD一9563,發出三聲二閃光。并觸發一個高電平,驅動無線信號發射電路。
上傳時間: 2013-11-09
上傳用戶:gxmm
一種基于ST62單片機的稱重顯示控制器A Weighing Display Controller Based on ST62 Single Chip Computer祛 FA(上海時博飛奧控制系統有限公司,上海201100)摘要在介紹了基于ST62單片機的基礎上,詳細描述了稱重顯控制器的硬件設計和軟件設計思路。該控制器結構簡單、操作方便、抗擾能力強等優點;具有較好的推廣應用價值。關鍵詞稱重顯示控制儀ST62單片機硬件設計軟件設計Abstract Ont heb asiso fin torductiono fST 62s inglec hipc omputer,th ed esignc oncrptof h ardwarea nds oftwarefo rw eighingd isplayc ontorleris d escrbed.The controler features simple structure, ease operation, powerful capability of anti-interference, etc.,it is wealth to be promoted into practicalapplicationsKeywords We妙噸display0 引言ST62s inglec hip Hardwared esign Softwaer design備 份 振 蕩器,振蕩器保護電路,上電復位及低壓檢測復稱 重 顯 示控制器是一種具有數字顯示、開關量輸出、定值控制和通信功能的以微機為操作核心的稱重控制裝置。它是電子衡器的重要基礎部件,直接影響電子衡器及電子稱重系統的功能和性能。與合適的傳感器及承重傳力復位系統組合可組成配料秤、料斗秤、定值秤、平臺秤、汽車秤等,廣泛應用于電力、化工、建筑、冶金、交通運輸、食品、軍工等部門,是進行自動稱重配料控制和生產過程自動化必不可少的重要檢測、控制裝置。隨著 稱 重 計量自動化水平的提高,對稱重顯示控制器的要求也越來越高。為實現低漂移、高穩定,本控制器采用低漂移、高增益放大器AD620和高分辨率的A/D轉換器CS5550。為提高穩定性和可靠性,采用集成度高的、抗干擾能力強的ST62單片機。
上傳時間: 2013-10-29
上傳用戶:釣鰲牧馬
單片機系統“PC”失控的軟件措施Software Measure of GettingO uto fC ontrolfo r“PC"in S ingleC hipC omputerS ystem謐 加 春 王 曉 基 雷 小 華(江 西 理 工 大 學機 電 工 程 學 院 ,贛 州 34 10 00)摘要單片機系統在實際工業現場中可能遇到各種干擾和自身的隨機性故障。現場惡劣的環境有可能使計算機系統發生異常,計算機程序指針“PC”失控就是常見的故障之一,如果發生“PC”失控,將導致CPI工作混亂,釀成嚴重的事故。研究了“PC”失控的原因,并指出軟件抗干擾的幾種方法,有效保證單片機系統的正常工作。關鍵詞單片機“PC”失控抗干擾Abstract Inp racticalin dustrialfi elds,th ereis v ariousin terferencea fectingo perationo fsi nglec hipc omputersy stemsa ndt hec omputersy stems。fac噸random faults飾themselves. It is very common that the severe environment makes the computer systems abnormal. The program counter "PC"gettingo utof co ntorlis on eo fth ec ommonfa ults.If th isoc curs,C PUw ouldb eru nningo utof or deran din torducesse riousan cient.T hec ausesof " PC"geting out of control, studied in this paper and some countermeasures of anti-interference師software are given to ensure single chip computer systemworking properly.Keywords Single。飾computer Porgramc ounter"P C" Anti-interfeernc 在設 計 和 開發單片機系統時,一般難以周全地預計單片機系統在實際工業現場中可能遇到的各種干擾和自身的隨機性故障。因此,除了采取防止和抑制干擾的各項措施外,還應該借助于軟件措施克服某些干擾,系統還應具備迅速自行恢復的能力。本文介紹的應對單片機系統PC失控的軟件措施,設計靈活,節省硬件資源,能保證測控系統長期可靠地運行。MC S- 5 1單片機以其優良的性能價格比大量應用于工業現場測試和控制領域。但是,現場惡劣的環境有可能使計算機系統發生異常,計算機程序指針PC失控就是常見的故障之一,一旦發生PC“走飛”,計算機系統就會出現工作混亂,釀成嚴重的事故。為 了 在 CP 失控時盡量減少由此帶來的不利影響,并盡快使系統恢復正常,需要采取一定的軟件措施和硬件措施。常見的硬件措施有“看門狗”電路。軟件措施設置的前提條件是:①在干擾作用下,微機系統硬件部分不會受到任何損壞,或者損壞部分設置有監測狀態可供查詢;②程序區不會受到干擾侵害。單片機系統的程序和表格以及重要的參數均設置在ROM區,不會因干擾的侵人而改變;③ RAM區中的重要數據不會被破壞,或者雖然被破壞,但是可以重新建立。
上傳時間: 2013-11-02
上傳用戶:bhqrd30
自動檢測80C51 串行通訊中的波特率本文介紹一種在80C51 串行通訊應用中自動檢測波特率的方法。按照經驗,程序起動后所接收到的第1 個字符用于測量波特率。這種方法可以不用設定難于記憶的開關,還可以免去在有關應用中使用多種不同波特率的煩惱。人們可以設想:一種可靠地實現自動波特檢測的方法是可能的,它無須嚴格限制可被確認的字符。問題是:在各種的條件下,如何可以在大量允許出現的字符中找出波特率的定時間隔。顯然,最快捷的方法是檢測一個單獨位時間(single bit time),以確定接收波特率應該是多少??墒牵赗S-232 模式下,許多ASCII 字符并不能測量出一個單獨位時間。對于大多數字符來說,只要波特率存在合理波動(這里的波特率是指標準波特率),從起始位到最后一位“可見”位的數據傳輸周期就會在一定范圍內發生變化。此外,許多系統采用8 位數據、無奇偶校驗的格式傳輸ASCII 字符。在這種格式里,普通ASCII 字節不會有MSB 設定
上傳時間: 2013-10-15
上傳用戶:shirleyYim
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
標簽: Base-Station Applications Single-Chip Transceiver
上傳時間: 2013-11-07
上傳用戶:songrui
The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
上傳時間: 2013-11-01
上傳用戶:dingdingcandy
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間: 2013-11-14
上傳用戶:fdmpy
L2TP(Layer Two tunneling Protocol)是實現二層隧道VPN(Virtual Private Network)的主要技術,有L2TPV2和L2TPV3兩個協議標準;為了進一步提高私有網絡的安全性,本文研究了VPN和L2TP隧道技術的基本實現技術,并在現有L2TPV2協議非對稱工作模型的基礎上實現了向下兼容的支持對稱工作模型的L2TPV3協議,并對系統的功能和性能進行了測試和分析,測試結果顯示該實現方案能夠正常完成L2TPV3隧道的建立以及協議報文的收發,且系統性能穩定。
標簽: L2TPV3
上傳時間: 2013-10-31
上傳用戶:iven
基于Message-Passing Interface ( MPI)的編程環境,以PML (Perfectly Matched Layer)為吸收邊界條件,討論了時域有限差分法FDTD的三維并行運算情況。通過一定的數值計算,定量地給出了MPI下FDTD并行算法中的網格數、進程數、分割方式三者之間的關系以及對計算效率的影響。
上傳時間: 2013-11-05
上傳用戶:啊颯颯大師的