單片機系統“PC”失控的軟件措施Software Measure of GettingO uto fC ontrolfo r“PC"in S ingleC hipC omputerS ystem謐 加 春 王 曉 基 雷 小 華(江 西 理 工 大 學機 電 工 程 學 院 ，贛 州 34 10 00)摘要單片機系統在實際工業現場中可能遇到各種干擾和自身的隨機性故障。現場惡劣的環境有可能使計算機系統發生異常，計算機程序指針“PC”失控就是常見的故障之一，如果發生“PC”失控，將導致CPI工作混亂，釀成嚴重的事故。研究了“PC”失控的原因，并指出軟件抗干擾的幾種方法，有效保證單片機系統的正常工作。關鍵詞單片機“PC”失控抗干擾Abstract Inp racticalin dustrialfi elds,th ereis v ariousin terferencea fectingo perationo fsi nglec hipc omputersy stemsa ndt hec omputersy stems。fac噸random faults飾themselves. It is very common that the severe environment makes the computer systems abnormal. The program counter "PC"gettingo utof co ntorlis on eo fth ec ommonfa ults.If th isoc curs,C PUw ouldb eru nningo utof or deran din torducesse riousan cient.T hec ausesof " PC"geting out of control， studied in this paper and some countermeasures of anti-interference師software are given to ensure single chip computer systemworking properly.Keywords Single。飾computer Porgramc ounter"P C" Anti-interfeernc
在設 計 和 開發單片機系統時，一般難以周全地預計單片機系統在實際工業現場中可能遇到的各種干擾和自身的隨機性故障。因此，除了采取防止和抑制干擾的各項措施外，還應該借助于軟件措施克服某些干擾，系統還應具備迅速自行恢復的能力。本文介紹的應對單片機系統PC失控的軟件措施，設計靈活，節省硬件資源，能保證測控系統長期可靠地運行。MC S- 5 1單片機以其優良的性能價格比大量應用于工業現場測試和控制領域。但是，現場惡劣的環境有可能使計算機系統發生異常，計算機程序指針PC失控就是常見的故障之一，一旦發生PC“走飛”，計算機系統就會出現工作混亂，釀成嚴重的事故。為 了 在 CP 失控時盡量減少由此帶來的不利影響，并盡快使系統恢復正常，需要采取一定的軟件措施和硬件措施。常見的硬件措施有“看門狗”電路。軟件措施設置的前提條件是:①在干擾作用下，微機系統硬件部分不會受到任何損壞，或者損壞部分設置有監測狀態可供查詢;②程序區不會受到干擾侵害。單片機系統的程序和表格以及重要的參數均設置在ROM區，不會因干擾的侵人而改變;③ RAM區中的重要數據不會被破壞，或者雖然被破壞，但是可以重新建立。
Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
This application note covers the design considerations of a system using the performance
features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The
design focuses on high system throughput through the AXI Interconnect core with F
MAX
and
area optimizations in certain portions of the design.
The design uses five AXI video direct memory access (VDMA) engines to simultaneously move
10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p
format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video
test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary
video timing signals. Data read by each AXI VDMA is sent to a common on-screen display
(OSD) core capable of multiplexing or overlaying multiple video streams to a single output video
stream. The output of the OSD core drives the DVI video display interface on the board.
Performance monitor blocks are added to capture performance data. All 10 video streams
moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are
controlled by a MicroBlaze™ processor.
The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the
Xilinx® ML605 Rev D evaluation board
A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
The Maxim Integrated 71M6541-DB REV 3.0 Demo Board is a demonstration board for evaluating the 71M6541 device for single-phase electronic energy metering applications in conjunction with the Remote Sensor Inter-face. It incorporates a 71M6541 integrated circuit, a 71M6601 Remote Interface IC, peripheral circuitry such as a serial EEPROM, emulator port, and on-board power supply. A serial to USB converter allows communication to a PC through a USB port. The Demo Board allows the evaluation of the 71M6541 energy meter chip for measurement accuracy and overall system use.
Abstract: Communication with 1-Wire slave devices requires a 1-Wire master. There are numerous ways to build a 1-Wire master (see reference design 4206, "Choosing the Right 1-Wire Master for Embedded Applications"). Thisdocument describes the DS1WM, a synthesizable 1-Wire master that can be implemented in an application-specificintegrated circuit (ASIC) or field-programmable gate array (FPGA).
