VHDL實現SPI功能源代碼 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "SLave". Typically both the -- master and SLave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- SLave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.
上傳時間： 2013-12-23
上傳用戶：lx9076
Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on master and SLave peripherals, such as microprocessors, memory, UART, timer, etc.
標簽： Avalon Specification specification accommodate
上傳時間： 2014-03-06
上傳用戶：pompey
An AHB system is made of masters SLaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a SLave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a SLave (single SLave verus multi-SLave or arbitrated SLave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more SLave nodes and a master node in a new "complex" node.
標簽： interconnections approach general include
上傳時間： 2015-12-12
上傳用戶：lyy1234
一般使用PC Based Controller 都是當作現場設備的一種，也就是要接受 主系統的命令，做一些操作控制。以Modbus 來看屬于SLave 的角色，隨 時等待接收Modbus Master 的Query Message，然后依據內容做控制，最后 將控制結果以Response Message 回傳。本章將以ICP 7524 及ICP 7188E5 等 兩種設備分別設計Modbus RTU、ASCII 及Modbus/TCP 的SLave 應用程序， 讀者可以將此兩種程序的架構再延伸設計至各種實際應用程序。
標簽： Controller Based 現場設備
上傳時間： 2015-12-16
上傳用戶：nanxia
畢業課題部分程序： CY7C68013 Bulk IN 68013工作在AUTO IN模式，16位總線 SLave FIFO.MASTER是 ADI BF533。
上傳時間： 2013-12-22
上傳用戶：aig85
這是基于CY7C68013芯片，工作于SLave FIFO模式的數據傳輸的程序。包括USB固件程序的程序框架和傳輸功能實現程序。
上傳時間： 2013-12-31
上傳用戶：hgy9473
This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Single Master Mode, and the EEPROM is the only SLave device connected to the SPI bus. The read/write operations are tailored to access a Microchip 4 kB EEPROM
標簽： configured accesses program EEPROM
上傳時間： 2016-03-29
上傳用戶：gut1234567
// This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // SLave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:
標簽： configured accesses program EEPROM
上傳時間： 2014-01-18
上傳用戶：liglechongchong
// This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // SLave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:
標簽： configured accesses program EEPROM
上傳時間： 2016-04-12
上傳用戶：qb1993225
This example demonstrates how the C8051F06x SMBus interface can communicate // with a 256 byte I2C Serial EEPROM (Microchip 24LC02B). // - Interrupt-driven SMBus implementation // - Only master states defined (no SLave or arbitration) // - Timer4 used by SMBus for SCL low timeout detection // - SCL frequency defined by <SMB_FREQUENCY> constant
標簽： demonstrates communicate C8051F06x interface
上傳時間： 2016-04-12
上傳用戶：hanli8870
