This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2410X includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標(biāo)簽： This microprocessor describes S3C2410X
上傳時(shí)間： 2014-01-11
上傳用戶(hù)：shizhanincc
Behavioral models are used in games and computer graphics for realistic simulation of massive crowds. In this paper, we present a GPU based implementation of Reynolds [1987] algorithm for simulating flocks of birds and propose an extension to consider environment self occlusion. We performed several experiments and the results showed that the proposed approach runs up to three times faster than the original algorithm when simulating high density crowds, without compromising significantly the original crowd behavior.
標(biāo)簽： Behavioral simulation realistic computer
上傳時(shí)間： 2017-09-08
上傳用戶(hù)：hanli8870
Commercially available active noise control headphones rely on fixed analog controllers to drive "anti-noise" loudspeakers. Our design uses an adaptive controller to optimally cancel unwanted acoustic noise. This headphone would be particularly useful for workers who operate or work near heavy machinery and engines because the noise is selectively eliminated. Desired sounds, such as speech and warning signals, are left to be heard clearly. The adaptive control algorithm is implemented on a Texas Instruments (TI™ ) 1 TMS320C30GEL digital signal processor (DSP), which drives a Sony CD550 headphone/microphone system. Our experiments indicate that adaptive noise control results in a dramatic improvement in performance over fixed noise control. This improvement is due to the availability of high-performance programmable DSPs and the self-optimizing and tracking capabilities of the adaptive controller in response to the surrounding noise.
標(biāo)簽： Commercially controllers headphones available
上傳時(shí)間： 2013-12-04
上傳用戶(hù)：dyctj
The TJA1040 is an advanced high speed CAN transceiver for use in automotive and general industrial applications. It supports the differential bus signal representation described in the international standard for in-vehicle high speed CAN applications (ISO11898). CAN (Controller Area Network) is the standard protocol for serial in-vehicle bus communication, particularly for Engine Management and Body Multiplexing. The TJA1040 provides a Standby mode, as known from its functional predecessors PCA82C250 and PCA82C251, but with significantly reduced power consumption. Besides the excellent low-power behavior the TJA1040 offers several valuable system improvements. Highlights are the absolute passive bus behavior if the device is unpowered as well as the excellent EMC performance.
標(biāo)簽： CAN
上傳時(shí)間： 2015-03-23
上傳用戶(hù)：Yuan Lo
High-Fidelity Component Substitution Pansharpening by the Fitting of Substitution Data 代碼實(shí)現(xiàn)
標(biāo)簽： High-Fidelity Component Substitution Pansharpening by the Fitting of Substitution Data matlab
上傳時(shí)間： 2015-05-04
上傳用戶(hù)：rrrr123789
This product has been retired and is not recommended for new designs. For new designs, S25FL040A supersedes S25FL004A. Please refer to the S25FL040A for specifications andordering information. Availability of this document is retained for reference and historical purposes only
標(biāo)簽： 模型
上傳時(shí)間： 2015-06-16
上傳用戶(hù)：mingjieji
This product has been retired and is not recommended for new designs. For new designs, S25FL040A supersedes S25FL004A. Please refer to the S25FL040A for specifications andordering information. Availability of this document is retained for reference and historical purposes only
標(biāo)簽： flash模型
上傳時(shí)間： 2015-06-16
上傳用戶(hù)：mingjieji
We introduce a sub-cell WENO reconstruction method to evaluate spatial derivatives in the high-order ADER scheme. The basic idea in our reconstruction is to use only r stencils to reconstruct the point-wise values of solutions and spatial derivatives for the 2r-1 th order ADER scheme in one dimension, while in two dimensions, the dimension-by-dimension sub-cell reconstruction approach for spatial derivatives is employed. Compared with the original ADER scheme of Toro and Titarev (2002) [2] that uses the direct derivatives of reconstructed polynomials for solutions to evaluate spatial derivatives, our method not only reduces greatly the computational costs of the ADER scheme on a given mesh, but also avoids possible numerical oscillations near discontinuities, as demonstrated by a number of one- and two-dimensional numerical tests. All these tests show that the 5th-order ADER scheme based on our sub-cell reconstruction method achieves the desired accuracy, and is essentially non-oscillatory and computationally cheaper for problems with discontinuities.
標(biāo)簽： 高精度格式
上傳時(shí)間： 2016-01-13
上傳用戶(hù)：ccsdcczd
Guided vehicles (GVs) are commonly used for the internal transportation of loads in warehouses, production plants and terminals. These guided vehicles can be routed with a variety of vehicle dispatching rules in an attempt to meet performance criteria such as minimizing the average load waiting times. In this research, we use simulation models of three companies to evaluate the performance of several real-time vehicle dispatching rules, in part described in the literature. It appears that there is a clear difference in average load waiting time between the different dispatching rules in the different environments. Simple rules, based on load and vehicle proximity (distance-based) perform best for all cases. The penalty for this is a relatively high maximum load waiting time. A distance-based rule with time truncation, giving more priority to loads that have to wait longer than a time threshold, appears to yield the best possible overall performance. A rule that particularly considers load-waiting time performs poor overall. We also show that using little pre-arrival information of loads leads to a significant improvement in the performance of the dispatching rules without changing their performance ranking.
標(biāo)簽： Testing and classifying vehicle dispatching rules in three real-world settings
上傳時(shí)間： 2016-04-01
上傳用戶(hù)：五塊錢(qián)的油條
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上傳時(shí)間： 2016-05-06
上傳用戶(hù)：fagong
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