本設(shè)計(jì)的基本要求是以復(fù)雜可編程邏輯器件CPLD為基礎(chǔ)，通過(guò)在EDA系統(tǒng)軟件ispDesignExpert System 環(huán)境下進(jìn)行數(shù)字系統(tǒng)設(shè)計(jì)，熟練掌握該環(huán)境下的功能仿真，時(shí)間仿真，管腳鎖定和芯片下載。 本系統(tǒng)基本上比較全面的模擬了計(jì)數(shù)式數(shù)字頻率計(jì)，廣泛應(yīng)用于工業(yè)、民用等各個(gè)領(lǐng)域，具有一定的開(kāi)發(fā)價(jià)值。
標(biāo)簽： ispDesignExpert System EDA 系統(tǒng)軟件
上傳時(shí)間： 2013-09-05
上傳用戶：文993
System will automatically delete the directory
標(biāo)簽： automatically directory System delete
上傳時(shí)間： 2013-09-09
上傳用戶：toyoad
本文簡(jiǎn)單討論并總結(jié)了VHDL、Verilog，System verilog 這三中語(yǔ)言的各自特點(diǎn)和區(qū)別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
標(biāo)簽： Verilog verilog System VHDL
上傳時(shí)間： 2013-10-16
上傳用戶：牛布牛
Introduce High-Speed Digital System Design.
標(biāo)簽： High-Speed Digital Design System
上傳時(shí)間： 2013-10-20
上傳用戶：gps6888
Xilinx公司推出的DSP設(shè)計(jì)開(kāi)發(fā)工具System Generator是在Matlab環(huán)境中進(jìn)行建模，是DSP高層系統(tǒng)設(shè)計(jì)與Xilinx FPGA之間實(shí)現(xiàn)的“橋梁”。在分析了FPGA傳統(tǒng)級(jí)設(shè)計(jì)方法的基礎(chǔ)上，提出了基于System Generator的系統(tǒng)級(jí)設(shè)計(jì)新方法，并應(yīng)用新方法設(shè)計(jì)驗(yàn)證了一套數(shù)字下變頻系統(tǒng)，通過(guò)仿真和實(shí)驗(yàn)結(jié)果驗(yàn)證了該方法的有效性和準(zhǔn)確性。
標(biāo)簽： Generator System 數(shù)字 變頻設(shè)計(jì)
上傳時(shí)間： 2013-11-18
上傳用戶：小草123
為了改變目前電網(wǎng)現(xiàn)場(chǎng)作業(yè)管理的變電巡檢、變電檢修試驗(yàn)、輸電線路巡檢檢修等管理系統(tǒng)各自獨(dú)立運(yùn)行，信息不能共享，功能、效率受限，建設(shè)和維護(hù)成本高的現(xiàn)狀，提出了采用B/S+C/S構(gòu)架模式，將各現(xiàn)場(chǎng)作業(yè)管理模塊和生產(chǎn)MIS（管理系統(tǒng)）集成為一體的現(xiàn)場(chǎng)作業(yè)管理系統(tǒng)的設(shè)計(jì)方案，做到各子系統(tǒng)和生產(chǎn)MIS軟硬資源共享，做到同一數(shù)據(jù)唯一入口、一處錄入多處使用。各子系統(tǒng)設(shè)備人員等基礎(chǔ)信息來(lái)源于生產(chǎn)管理系統(tǒng)，各子系統(tǒng)又是生產(chǎn)管理系統(tǒng)的作業(yè)數(shù)據(jù)、缺陷信息的重要來(lái)源。經(jīng)過(guò)研究試用成功和推廣應(yīng)用，目前該系統(tǒng)已在江西電網(wǎng)220 kV及以上變電站全面應(yīng)用。 Abstract: In order to improve the status that the substation field inspection system， substation equipments maintenance and testing system， power-line inspection and maintenance system are running independent with each other. They can?蒺t share the resource information which accordingly constrains their functions and efficiency， and their construction and maintenance costs are high. This paper introduces a field standardized work management system based on B/S+C/S mode， integrating all field work management systems based on MIS and share the equipments and employee?蒺s data of MIS，the field work data of the sub systems are the source information of MIS， by which the same single data resouce with one-time input can be utilized in multiple places. After the research and testing， this system is triumphantly using in all 220kV and above substations in Jiangxi grid.
標(biāo)簽： 電網(wǎng) 信息化 管理系統(tǒng)
上傳時(shí)間： 2013-11-15
上傳用戶：han_zh
為降低成本和解決現(xiàn)有膜片鉗放大器系統(tǒng)中PC機(jī)的干擾問(wèn)題，研究了一種基于單片機(jī)的膜片鉗放大器小系統(tǒng)。該系統(tǒng)采用ADI公司生產(chǎn)的ADuC841作為控制核心，并且配置相應(yīng)的液晶顯示模塊LCM3202401。模擬電路部分采用高輸入阻抗的AD8627實(shí)現(xiàn)微電流信號(hào)的采集，并由后級(jí)電路進(jìn)行信號(hào)的放大和電阻電容的補(bǔ)償。它具有硬件電路簡(jiǎn)單、體積小、使用方便的特點(diǎn)。既可以單獨(dú)作為小系統(tǒng)實(shí)現(xiàn)采集和顯示，也可以通過(guò)紅外方式和PC機(jī)進(jìn)行通訊，在PC機(jī)上進(jìn)行信號(hào)的處理。 Abstract: In order to reduce cost and resolve the interferential problem with PC in existing patch clamp amplifiers, a small patch clamp amplifier system design based on microcontroller is studied. It adopts a new high performance microconverter ADuC841 by the ADI as the control core in the system, configuring a liquid crystal module LCM3202401. In the analog circuit, AD8627 with high input impedance is used to detect the low current，signal magnification, as well as resistance and capacitance compensation are accomplished by subsequent circuits. It has the advantage of simple hardware circuit design, small volume and convenient operation. It can either be used as an independent system to measure and show signal detected or transmit to PC by infrared ray.
上傳時(shí)間： 2013-11-06
上傳用戶：yy_cn
The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
標(biāo)簽： Demonstration 3200 USB for
上傳時(shí)間： 2014-02-27
上傳用戶：zhangzhenyu
提出了一個(gè)由AT89C52單片機(jī)控制步進(jìn)電機(jī)的實(shí)例。可以通過(guò)鍵盤(pán)輸入相關(guān)數(shù)據(jù), 并根據(jù)需要, 實(shí)時(shí)對(duì)步進(jìn)電機(jī)工作方式進(jìn)行設(shè)置, 具有實(shí)時(shí)性和交互性的特點(diǎn)。該系統(tǒng)可應(yīng)用于步進(jìn)電機(jī)控制的大多數(shù)場(chǎng)合。實(shí)踐表明, 系統(tǒng)性能優(yōu)于傳統(tǒng)的步進(jìn)電機(jī)控制器。關(guān)鍵詞: 單片機(jī); 步進(jìn)電動(dòng)機(jī); 直流固態(tài)繼電器; 實(shí)時(shí)控制Con trol System of Stepp ingMotor Ba sed on AT89C52 ChipM icrocomputerMENGWu2sheng, L ILiang (College of Automatization, Northwestern Polytechnical Unversity, Xipan 710072, China)ABSTRACT: A stepp ing motor control system based on AT89C52 chip microcomputer was described.The data can be inputwith keyboard, and stepp ingmotorwas controlled by these data. According to the demand, users can set the workingmodel of stepp ingmotor in real2time. This system can be widely used in stepp ing motor controlling. The p ractice showed that the performance of this system outdid the tradi tional stepp ing motor controller.KEY WORDS: Chip microcomputer; Stepp ingmotor; DCSSR; Real2time control
標(biāo)簽： Control System ingMot Stepp
上傳時(shí)間： 2013-11-19
上傳用戶：leesuper
針對(duì)嵌入式機(jī)器視覺(jué)系統(tǒng)向獨(dú)立化、智能化發(fā)展的要求，介紹了一種嵌入式視覺(jué)系統(tǒng)--智能相機(jī)。基于對(duì)智能相機(jī)體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析，對(duì)國(guó)內(nèi)外的幾款智能相機(jī)進(jìn)行比較。綜合技術(shù)發(fā)展現(xiàn)狀，提出基于FPGA+DSP模式的硬件平臺(tái)，并提出智能相機(jī)的發(fā)展方向。分析結(jié)果表明，該系統(tǒng)設(shè)計(jì)可以實(shí)現(xiàn)脫離PC運(yùn)行，完成圖像獲取與分析，并作出相應(yīng)輸出。 Abstract: This paper introduced an embedded vision system-intelligent camera ，which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture， component modules and image acquisition， transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad， the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design， the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.
標(biāo)簽： FPGA DSP 模式 智能相機(jī)
上傳時(shí)間： 2013-10-24
上傳用戶：bvdragon
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