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Semantic-based

  • 基于DSP的新型柴油發(fā)電機(jī)勵(lì)磁控制系統(tǒng)研究

    在綜合分析諧波勵(lì)磁無刷同步發(fā)電機(jī)勵(lì)磁控制系統(tǒng)的基礎(chǔ)上,對(duì)其勵(lì)磁控制策略進(jìn)行了研究,開發(fā)了一套基于DSP( TMS320F2812) 控制的新型柴油發(fā)電機(jī)勵(lì)磁控制系統(tǒng),該系統(tǒng)采用參數(shù)自適應(yīng)模糊PID 控制勵(lì)磁,選用交流采樣方式實(shí)時(shí)檢測(cè)各信號(hào)的瞬時(shí)特性,系統(tǒng)仿真結(jié)果以及在1 臺(tái)25 kW 工頻柴油發(fā)電機(jī)上的試驗(yàn)結(jié)果證明了該控制器具有較好的電壓調(diào)節(jié)特性,系統(tǒng)穩(wěn)態(tài)和暫態(tài)性能完全滿足發(fā)電機(jī)對(duì)勵(lì)磁系統(tǒng)的要求。關(guān)鍵詞:勵(lì)磁調(diào)節(jié);模糊PID 控制;數(shù)字信號(hào)處理器;交流采樣 Abstract :According to the general analysis of the excitation cont rol system of the harmonious wave excitation brushless synchronous generator and it s characteristics ,a new type of diesel generator excitation cont rol system based on DSP( TMS320F2812) was designed. An adaptive fuzzy PID cont rol of excitation is used in this system. To detect the t ransient characteristics of the signals in a timely manner ,AC sampling was applied.The system simulation result s and the testing result s f rom a 25 kW diesel generator (50 Hz) can prove that the voltage regulation characteristics of the excitation cont rol system are very well ,and both the steadyOstate performance and the t ransient performance of the generator are also good.Key words :excitation cont rol ;fuzzy PID cont rol ;digital signal processor (DSP) ;AC sampling

    標(biāo)簽: DSP 柴油發(fā)電機(jī) 勵(lì)磁控制 系統(tǒng)研究

    上傳時(shí)間: 2013-10-29

    上傳用戶:fxf126@126.com

  • 基于DSP的ATV-ATT中控系統(tǒng)設(shè)計(jì)

    設(shè)計(jì)一種應(yīng)用于某全地形ATV車載武器裝置中的中控系統(tǒng),該系統(tǒng)設(shè)計(jì)是以TMS320F2812型DSP為核心,采用模塊化設(shè)計(jì)思想,對(duì)其硬件部分進(jìn)行系統(tǒng)設(shè)計(jì),能夠完成對(duì)武器裝置高低、回轉(zhuǎn)方向的運(yùn)動(dòng)控制,實(shí)現(xiàn)靜止或行進(jìn)狀態(tài)中對(duì)目標(biāo)物的測(cè)距,自動(dòng)瞄準(zhǔn)以及按既定發(fā)射模式發(fā)射彈丸和各項(xiàng)安全性能檢測(cè)等功能。通過編制相應(yīng)的軟件,對(duì)其進(jìn)行系統(tǒng)調(diào)試,驗(yàn)證了該設(shè)計(jì)運(yùn)行穩(wěn)定。 Abstract:  A central control system applied to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core, uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment, rotation direction, to achieve a state of static or moving objects on the target ranging, auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate software and to carry out system testing to verify the stability of this design and operation.

    標(biāo)簽: ATV-ATT DSP 中控系統(tǒng)

    上傳時(shí)間: 2013-11-02

    上傳用戶:jshailingzzh

  • 基于DSP的車載雷達(dá)測(cè)速系統(tǒng)設(shè)計(jì)

    針對(duì)運(yùn)行中火車測(cè)速運(yùn)用多普勒效應(yīng)采用DSP 設(shè)計(jì)雷達(dá)測(cè)速系統(tǒng)并闡述了其基本設(shè)計(jì)思想與工作原理給出系統(tǒng)硬件軟件設(shè)計(jì)結(jié)構(gòu)和原理圖改善了原有光電測(cè)速精度提高了系統(tǒng)工作穩(wěn)定性和可靠性經(jīng)實(shí)驗(yàn)證明DSP 采集板工作穩(wěn)定測(cè)速效果好關(guān)鍵詞DSP; 雷達(dá)測(cè)速; 多普勒效應(yīng) On Board DSP-Based Radar Speed Measurement System TANG Wei, SUN Zhi-fang, CHEN Quan (Dept.of computer Science,Yangtze University,Jingzhou 434023,China)Abstract: This paper presents a DSP-based train speed measurement by using Doppler radar. The structure of the system is introduced.The hardware and software are also discussed.Key words: DSP; rader speed measurement; doppler principle

    標(biāo)簽: DSP 車載 系統(tǒng)設(shè)計(jì) 雷達(dá)測(cè)速

    上傳時(shí)間: 2013-10-27

    上傳用戶:003030

  • 采用TüV認(rèn)證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標(biāo)簽: FPGA 安全系統(tǒng)

    上傳時(shí)間: 2013-11-05

    上傳用戶:維子哥哥

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    標(biāo)簽: Solutions Analog Xilinx FPGAs

    上傳時(shí)間: 2013-11-01

    上傳用戶:a67818601

  • WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案

    WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標(biāo)簽: 369 WP 擴(kuò)展式 處理平臺(tái)

    上傳時(shí)間: 2013-10-22

    上傳用戶:685

  • xilinx Zynq-7000 EPP產(chǎn)品簡(jiǎn)介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    標(biāo)簽: xilinx Zynq 7000 EPP

    上傳時(shí)間: 2013-11-01

    上傳用戶:dingdingcandy

  • PLD對(duì)FPGA數(shù)據(jù)加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    標(biāo)簽: FPGA PLD 數(shù)據(jù)加密

    上傳時(shí)間: 2013-11-06

    上傳用戶:wl9454

  • 基于FPGA+DSP模式的智能相機(jī)設(shè)計(jì)

    針對(duì)嵌入式機(jī)器視覺系統(tǒng)向獨(dú)立化、智能化發(fā)展的要求,介紹了一種嵌入式視覺系統(tǒng)--智能相機(jī)?;趯?duì)智能相機(jī)體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析,對(duì)國內(nèi)外的幾款智能相機(jī)進(jìn)行比較。綜合技術(shù)發(fā)展現(xiàn)狀,提出基于FPGA+DSP模式的硬件平臺(tái),并提出智能相機(jī)的發(fā)展方向。分析結(jié)果表明,該系統(tǒng)設(shè)計(jì)可以實(shí)現(xiàn)脫離PC運(yùn)行,完成圖像獲取與分析,并作出相應(yīng)輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標(biāo)簽: FPGA DSP 模式 智能相機(jī)

    上傳時(shí)間: 2013-10-24

    上傳用戶:bvdragon

  • 基于CPLD的QDPSK調(diào)制解調(diào)電路設(shè)計(jì)

    為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式,在分析四相相對(duì)移相(QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上,設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路,它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上,進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中,測(cè)試結(jié)果表明,調(diào)制電路能正確選相,解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致,達(dá)到了預(yù)期的設(shè)計(jì)要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標(biāo)簽: QDPSK CPLD 調(diào)制解調(diào) 電路設(shè)計(jì)

    上傳時(shí)間: 2014-01-13

    上傳用戶:qoovoop

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