iic總線控制器VHDL實(shí)現(xiàn)
-- VHDL Source Files:
i2c.vhd -- top level file
i2c_control.vhd -- control function for the I2C master/slave
shift.vhd -- shift register
uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC
upcnt4.vhd -- 4-bit up counter
i2c_timesim.vhd -- post-route I2C simulation netlist
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
The DSKs or eZdspTM LF2407 and the DMC1500 make up a table top motor
development system which allows engineers and software developers to evaluate
certain characteristics of the TMS320F240, TMS320F243, and TMS320LF2407 DSPs
to determine if the processor meets the designers application requirements. Evaluators
can create software to execute onboard or expand the system in a variety of ways.
