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針對船舶氣象儀保障維修而設計的船舶氣象儀測試系統，包括信息處理終端、主儀器檢測模塊、傳感器檢測模塊，各個模塊都采用基于AVR單片機的嵌入式系統，模塊之間通過CAN總線進行通信。結果表明，船舶氣象儀測試系統能夠快速檢測船舶氣象儀故障，與單純依靠人工方式排查故障相比，故障檢測時間縮短了60%以上。 Abstract: The test system of ship meteorological instrument was developed to satisfy the maintenance of ship meteorological instruments，which composed of information processing terminal， testing module of main instrument and testing module of sensors. Each of these modules included an embedded system based on microcontroller of AVR series and communicated with other module by CAN bus. The results show that the test system can judge the fault of ship meteorological instrument quickly and shorten the fault detection time as much as 60% compared with simple manual troubleshooting.
上傳時間： 2013-11-23
上傳用戶：stvnash
本文介紹了基于AT89C52 單片機的自動水溫控制系統的設計及實現過程。該系統具有實時顯示、溫度測量、溫度設定并能根據設定值對環境溫度進行調節實現控溫的目的以及達到上下限溫度報警功能，控制算法是基于數字PID 算法。關鍵詞 ：PID AT89C52 脈寬調制 實時 Abstract ： This article describes AT89C52 single-chip microcomputer-basedautomatic water temperature control system design and implementation process. Thesystem has real-time display, temperature measurement, temperature settings and theenvironment in accordance with the temperature settings adjusted to achieve thepurpose of temperature control and reach the upper and lower limits of temperaturealarm function, the control algorithm is based on the digital PID algorithm.Keyword: PID AT89C52 PWM real time
上傳時間： 2013-10-10
上傳用戶：歸海惜雪
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上傳時間： 2013-10-13
上傳用戶：ytulpx
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上傳時間： 2013-11-15
上傳用戶：zouxinwang
Features• Complete DTMF Receiver• Low power consumption• Internal gain setting amplifier• Adjustable guard time• Central office quality• Power-down mode• Inhibit mode• Backward compatible withMT8870C/MT8870C-1Applications• Receiver system for British Telecom (BT) orCEPT Spec (MT8870D-1)• Paging systems• Repeater systems/mobile radio• Credit card systems• Remote control• Personal computers• Telephone answering machine
上傳時間： 2013-11-20
上傳用戶：mpquest
NEC 16位MCU參考手冊 The 78K0R/IC3 is a 16-bit single-chip microcontroller that uses a 78K0R CPU core and incorporates peripheral functions, such as ROM/RAM, a multi-function timer, a multi-function serial interface, an A/D converter, a programmable gain amplifier (PGA), a comparator, a real-time counter, and a watchdog timer.
上傳時間： 2013-11-02
上傳用戶：努力努力再努力
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標簽： Spartan-DSP Virtex FPGAs Ap
上傳時間： 2013-10-23
上傳用戶：raron1989
C51 中的關鍵字關鍵字 用途 說明auto 存儲種類說明 用以說明局部變量，缺省值為此break 程序語句 退出最內層循環case 程序語句 Switch 語句中的選擇項char 數據類型說明 單字節整型數或字符型數據const 存儲類型說明 在程序執行過程中不可更改的常量值continue 程序語句 轉向下一次循環default 程序語句 Switch 語句中的失敗選擇項do 程序語句 構成do..while 循環結構double 數據類型說明 雙精度浮點數else 程序語句 構成if..else 選擇結構enum 數據類型說明 枚舉extern 存儲種類說明 在其他程序模塊中說明了的全局變量flost 數據類型說明 單精度浮點數for 程序語句 構成for 循環結構goto 程序語句 構成goto 轉移結構if 程序語句 構成if..else 選擇結構int 數據類型說明 基本整型數long 數據類型說明 長整型數register 存儲種類說明 使用CPU 內部寄存的變量return 程序語句 函數返回short 數據類型說明 短整型數signed 數據類型說明 有符號數，二進制數據的最高位為符號位sizeof 運算符 計算表達式或數據類型的字節數static 存儲種類說明 靜態變量struct 數據類型說明 結構類型數據swicth 程序語句 構成switch 選擇結構typedef 數據類型說明 重新進行數據類型定義union 數據類型說明 聯合類型數據unsigned 數據類型說明 無符號數數據void 數據類型說明 無類型數據volatile 數據類型說明 該變量在程序執行中可被隱含地改變while 程序語句 構成while 和do..while 循環結構ANSIC 標準關鍵字關鍵字 用途 說明bit 位標量聲明 聲明一個位標量或位類型的函數sbit 位標量聲明 聲明一個可位尋址變量
標簽： C51
上傳時間： 2013-10-08
上傳用戶：waves_0801
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上傳時間： 2013-10-13
上傳用戶：13162218709
匯編器在微處理器的驗證和應用中舉足輕重，如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統設計思想，在匯編語言與機器語言間插入中間代碼CMDL（code mapping description language）語言，打破匯編語言與機器語言的直接映射關系，由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發了一套匯編器系統，具有較高層次上的通用性和可移植性。【關鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
