單片機系統“PC”失控的軟件措施Software Measure of GettingO uto fC ontrolfo r“PC"in S ingleC hipC omputerS ystem謐 加 春 王 曉 基 雷 小 華(江 西 理 工 大 學機 電 工 程 學 院 ，贛 州 34 10 00)摘要單片機系統在實際工業現場中可能遇到各種干擾和自身的隨機性故障。現場惡劣的環境有可能使計算機系統發生異常，計算機程序指針“PC”失控就是常見的故障之一，如果發生“PC”失控，將導致CPI工作混亂，釀成嚴重的事故。研究了“PC”失控的原因，并指出軟件抗干擾的幾種方法，有效保證單片機系統的正常工作。關鍵詞單片機“PC”失控抗干擾Abstract Inp racticalin dustrialfi elds,th ereis v ariousin terferencea fectingo perationo fsi nglec hipc omputersy stemsa ndt hec omputersy stems。fac噸random faults飾themselves. It is very common that the severe environment makes the computer systems abnormal. The program counter "PC"gettingo utof co ntorlis on eo fth ec ommonfa ults.If th isoc curs,C PUw ouldb eru nningo utof or deran din torducesse riousan cient.T hec ausesof " PC"geting out of control， studied in this paper and some countermeasures of anti-interference師software are given to ensure single chip computer systemworking properly.Keywords Single。飾computer Porgramc ounter"P C" Anti-interfeernc 在設 計 和 開發單片機系統時，一般難以周全地預計單片機系統在實際工業現場中可能遇到的各種干擾和自身的隨機性故障。因此，除了采取防止和抑制干擾的各項措施外，還應該借助于軟件措施克服某些干擾，系統還應具備迅速自行恢復的能力。本文介紹的應對單片機系統PC失控的軟件措施，設計靈活，節省硬件資源，能保證測控系統長期可靠地運行。MC S- 5 1單片機以其優良的性能價格比大量應用于工業現場測試和控制領域。但是，現場惡劣的環境有可能使計算機系統發生異常，計算機程序指針PC失控就是常見的故障之一，一旦發生PC“走飛”，計算機系統就會出現工作混亂，釀成嚴重的事故。為 了 在 CP 失控時盡量減少由此帶來的不利影響，并盡快使系統恢復正常，需要采取一定的軟件措施和硬件措施。常見的硬件措施有“看門狗”電路。軟件措施設置的前提條件是:①在干擾作用下，微機系統硬件部分不會受到任何損壞，或者損壞部分設置有監測狀態可供查詢;②程序區不會受到干擾侵害。單片機系統的程序和表格以及重要的參數均設置在ROM區，不會因干擾的侵人而改變;③ RAM區中的重要數據不會被破壞，或者雖然被破壞，但是可以重新建立。
上傳時間： 2013-11-02
上傳用戶：bhqrd30
自動檢測80C51 串行通訊中的波特率本文介紹一種在80C51 串行通訊應用中自動檢測波特率的方法。按照經驗，程序起動后所接收到的第1 個字符用于測量波特率。這種方法可以不用設定難于記憶的開關，還可以免去在有關應用中使用多種不同波特率的煩惱。人們可以設想：一種可靠地實現自動波特檢測的方法是可能的，它無須嚴格限制可被確認的字符。問題是：在各種的條件下，如何可以在大量允許出現的字符中找出波特率的定時間隔。顯然，最快捷的方法是檢測一個單獨位時間（single bit time），以確定接收波特率應該是多少。可是，在RS-232 模式下，許多ASCII 字符并不能測量出一個單獨位時間。對于大多數字符來說，只要波特率存在合理波動（這里的波特率是指標準波特率），從起始位到最后一位“可見”位的數據傳輸周期就會在一定范圍內發生變化。此外，許多系統采用8 位數據、無奇偶校驗的格式傳輸ASCII 字符。在這種格式里，普通ASCII 字節不會有MSB 設定
上傳時間： 2013-10-15
上傳用戶：shirleyYim
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
標簽： Base-Station Applications Single-Chip Transceiver
上傳時間： 2013-11-07
上傳用戶：songrui
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上傳時間： 2013-10-15
上傳用戶：euroford
The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
上傳時間： 2013-11-01
上傳用戶：dingdingcandy
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間： 2013-11-14
上傳用戶：fdmpy
針對傳統集成電路（ASIC）功能固定、升級困難等缺點，利用FPGA實現了擴頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實現NCO模塊，在下變頻模塊調用了硬核乘法器并引入CIC濾波器進行低通濾波，給出了DQPSK解調的原理和實現方法，推導出一種簡便的引入?仔/4固定相移的實現方法。采用模塊化的設計方法使用VHDL語言編寫出源程序，在Virtex-II Pro 開發板上成功實現了整個系統。測試結果表明該系統正確實現了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上傳時間： 2013-11-06
上傳用戶：liu123
為了在CDMA系統中更好地應用QDPSK數字調制方式，在分析四相相對移相（QDPSK)信號調制解調原理的基礎上，設計了一種QDPSK調制解調電路，它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上，進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中，測試結果表明，調制電路能正確選相，解調電路輸出數據與QDPSK調制輸入數據完全一致，達到了預期的設計要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
上傳時間： 2014-01-13
上傳用戶：qoovoop
A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
上傳時間： 2013-11-05
上傳用戶：Wwill
STM8S105xx_中文資料：這本數據手冊描述了STM8S105xx基礎型系列單片機的特點、引腳分配、電氣特性、機械特性和訂購信息。 如果需要關于STM8S單片機存儲器、寄存器和外設等的詳細信息，請參考STM8S系列單片機參考手冊(RM0016) 。 如果需要關于內部Flash存儲器的編程、擦除和保護的信息，請參考STM8S閃存編程手冊(PM0051) 。 如果需要關于調試和SWIM(single wire interface module單線接口模塊)，請參考STM8SWIM 通信協議和調試模塊用戶手冊(UM0470) 。 如果需要關于STM8 內核的信息，請參考STM8 CPU編程手冊(PM0044) 。
上傳時間： 2013-11-03
上傳用戶：JasonC
