Soc Design for h.264
Soc Design for h.264...
Soc Design for h.264...
SE-Candence SOC Encounter工具使用設計流程,源于一項項目...
Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, D...
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as bur...
SATA NAS SOC,200MHz ARM926EJS核 SATA接口的NAS用處理器,集成USB2.0 HOST接口,Ethernet控制器,DDR SDRAM控制器,PCI HOST接口,可以擴展PCI外設。...