This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the computer networking industry to receive data at a particular frequency and transmit them at another frequency. An asynchronous FIFO has two different clocks: one for read and one for write.
標(biāo)簽： Asynchronous asynchronous the discuss
上傳時(shí)間： 2013-12-09
上傳用戶：Thuan
This file is a function under matlab which allow to compute and plot fast fourier transform of a signal. We can observe the effect of the signal parameter can be changed such as frequency and N points.
標(biāo)簽： transform function compute fourier
上傳時(shí)間： 2017-06-27
上傳用戶：米卡
This file is a function under matlab which allow to read, play and plot audio signals from wav file. We can also extract the sampling frequency and coding bit number
標(biāo)簽： file function signals matlab
上傳時(shí)間： 2014-01-25
上傳用戶：diets
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
標(biāo)簽： technology 2.0 USB designed
上傳時(shí)間： 2014-01-02
上傳用戶：二驅(qū)蚊器
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
標(biāo)簽： technology 2.0 USB designed
上傳時(shí)間： 2017-07-05
上傳用戶：zhoujunzhen
P3.20. Consider an analog signal xa (t) = sin (2πt), 0 ≤t≤ 1. It is sampled at Ts = 0.01, 0.05, and 0.1 sec intervals to obtain x(n). b) Reconstruct the analog signal ya (t) from the samples x(n) using the sinc interpolation (use ∆ t = 0.001) and determine the frequency in ya (t) from your plot. (Ignore the end effects.) C) Reconstruct the analog signal ya (t) from the samples x (n) using the cubic spline interpolation and determine the frequency in ya (t) from your plot. (Ignore the end effects.)
標(biāo)簽： Consider sampled analog signal
上傳時(shí)間： 2017-07-12
上傳用戶：咔樂塢
A digital filter structure for wideband filtering is proposed. It consists of two allpass filters and a linearphase FIR filter. One major advantage of this structure is that the allpass filters are functions of zM which implies that the maximal sample frequency is M times higher for this structure than for the corresponding conventional structures.
標(biāo)簽： structure filtering consists proposed
上傳時(shí)間： 2014-01-21
上傳用戶：weixiao99
this manual for pc3000 mrtool! special repair harddisk for maxtor!but i need software pc3000 mrtool!you won look site : http://space.doit.com.cn/viewthread-45664.html
標(biāo)簽： mrtool 3000 for harddisk
上傳時(shí)間： 2017-07-23
上傳用戶：talenthn
This paper analyzes the vector control theory of asynchronous motors based on the magnetic orientation of motor rotors, and its mathematical model is made. Then the variable frequency vector speed-adjusting experimental system is built with the DSP TMS320F2812 which works as the core control chip and intelligent power module.
標(biāo)簽： asynchronous orientati the analyzes
上傳時(shí)間： 2013-12-08
上傳用戶：shinesyh
In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the frequency of the chaotic generators. The new method is based on the MATLAB® Software, Xilinx System Generator, Xilinx Alliance tools and Synplicity Synplify.
標(biāo)簽： introduced generators implement chaotic
上傳時(shí)間： 2017-07-24
上傳用戶：qq521
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