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  • CH340C+RT9013+MINI USB接口板 AD設計硬件原理圖+PCB文件 ALTIUM設計

    CH340C+RT9013+MINI USB接口板 AD設計硬件原理圖+PCB文件,ALTIUM設計的2層板設計,包括完整的原理圖和PCB文件,主要器件如下:Library Component Count : 12Name                Description----------------------------------------------------------------------------------------------------CAP                 CapacitorCC2640EM            CC2630 ModuleCH340               CH340 USB 2 UARTCON11               Connector 11pinsCON12               Connector 12pinsCON3X2              Connector 5*2LED                 LEDRES                 ResistorRT9013              RT9013 3.3VSWITCH              switch 6*6USB1                USB ConnectorsXDS110-Lte          XDS110-Lite Target Interface

    標簽: ch340c rt9013 usb 接口 ad設計

    上傳時間: 2021-11-24

    上傳用戶:canderile

  • NCP1399 電流模式控制器 手冊

    NCP1399 是高性能電流模式控制器,半橋諧 變換器。此控制器實現 600 V 門驅動、 簡化布 局和減少外部組件計數 。built - in 和 Brown - Out  輸入函數簡化了執行在所有應用程序的控制器。 在 PFC 前階段的應用 NCP1399 需要設有專用的 輸出驅動 PFC 前級控制器。此功能專用 skip-mode 技術進一步提高輕負載效率的整個應 用程序。 NCP1399 提供全套的保護功能允許安全 運行在任何應用程序中。這包括:過載保護,過 流保護以防止硬開關周期, brown- out 檢測,打 開光電耦合器檢測, 死區自動調整, 過電壓(OVP) 和 (OTP) 過溫保護

    標簽: ncp1399 電流模式控制器

    上傳時間: 2021-12-17

    上傳用戶:qingfengchizhu

  • TMS320F28035 DSP最小核心板開發板ALTIUM設計原理圖 無PCB板圖

    TMS320F28035 DSP最小核心板開發板ALTIUM設計原理圖,無PCB板圖。原理圖已在項目中使用,包括CAN通信電路和瓷隔離電路等,可以做為你的設計參考,所用器件型號如下:ADUM1201AT24CXXBAV99               R26010005CAP                 CapacitorHeader 4            Header, 4-PinHeader 4X2          Header, 4-Pin, Dual rowINDUCTORL2                  LM317               R25040043NTC                 R27040030OPTOISORES                 R20190049RES1                SN65HVD230/SO8SW-SPST             Single-Pole, Single-Throw SwitchTL431TMS320F28035-80XTAL                Crystal Oscillator

    標簽: tms320f28035 dsp

    上傳時間: 2021-12-22

    上傳用戶:trh505

  • DDR4標準 JESD79_4

    1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,X8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,X8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic Functionality..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with Stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34

    標簽: DDR4

    上傳時間: 2022-01-09

    上傳用戶:

  • STM32L053C8T6數據手冊

    STM32L053C8T6數據手冊Features ? Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.27 μA Standby mode (2 wakeup pins) – 0.4 μA Stop mode (16 wakeup lines) – 0.8 μA Stop mode + RTC + 8 KB RAM retention – 139 μA/MHz Run mode at 32 MHz – 3.5 μs wakeup time (from RAM) – 5 μs wakeup time (from Flash) ? Core: ARM? 32-bit Cortex?-M0+ with MPU – From 32 kHz up to 32 MHz max.  – 0.95 DMIPS/MHz ? Reset and supply management – Ultra-safe, low-power BOR (brownout reset)  with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) ? Clock sources – 1 to 25 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – High speed internal 16 MHz factory-trimmed RC  (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to  4.2 MHz RC – PLL for CPU clock ? Pre-programmed bootloader – USART, SPI supported ? Development support – Serial wire debug supported ? Up to 51 fast I/Os (45 I/Os 5V tolerant) ? Memories – Up to 64 KB Flash with ECC – 8KB RAM – 2 KB of data EEPROM with ECC – 20-byte backup register

    標簽: stm32l053c8t6

    上傳時間: 2022-02-06

    上傳用戶:

  • PW5300_2.0.pdf規格書下載

    The PW5300 is a current mode boost DC-DC converter. Its PWM circuitry with built-in 0.2? powerMOSFET make this regulator highly power efficient. The internal compensation network alsominimizes as much as 6 external component counts. The non-inverting input of error amplifierconnects to a 0.6V precision reference voltage and internal soft-start function can reduce the inrushcurrent. The PW5300 is available in the SOT23-6L package and provides space-saving PCB for theapplication fields

    標簽: pw5300

    上傳時間: 2022-02-11

    上傳用戶:jiabin

  • PW5200系列_2.0.pdf規格書下載

    The PW5200A/ PW5200C is high efficiency synchronous, PWM step-up DC/DC converters optimizedto provide a high efficient solution to medium power systems. The devices work with a 1.4MHz fixedfrequency switching. These features minimize overall solution footprint by allowing the use of tiny,low profile inductors and ceramic capacitors. Automatic PWM/PFM mode switching at light loadsaves power and improves efficiency

    標簽: pw5200

    上傳時間: 2022-02-11

    上傳用戶:

  • PW4055_2.0.pdf規格書下載

    The PW4055 is a complete constant-current /constant-voltage linear charger for single cell lithiumion batteries.Its ThinSOT package and low external component count make the PW4055 ideallysuited for portable applications.Furthermore, the PW4055 is specifically designed to work within USBpower specifications.The PW4055 No external sense resistor is needed, and no blocking diode is required due to theinternal MOSFET architecture.Thermal feedback regulates the charge current to limit the dietemperature during high power operation or high ambient temperature. The charge voltage is fixedat 4.2V, and the charge current can be programmed externally with a single resistor. The PW4055automatically terminates the charge cycle when the charge current drops to 1/10th the programmedvalue after the final float voltage is reached. When the input supply (wall adapter or USB supply) isremoved, the PW4055 automatically enters a low current state, dropping the battery drain currentto less than 2μA. The PW4055 can be put into shutdown mode, reducing the supply current to 25μA.The BAT pin has a 7KV ESD(HBM) capability. Other features include charge current monitor, undervoltage lockout, automatic recharge and a status pin to indicate charge termination and the presenceof an input voltage

    標簽: pw4055

    上傳時間: 2022-02-11

    上傳用戶:jason_vip1

  • PW2606B.pdf規格書下載

    The PW2606B is a front-end over voltage and over current protection device. It achieves wide inputvoltage range from 2.5VDC to 40VDC. The over voltage threshold can be programmed externally orset to internal default setting. The low resistance of integrated power path nFET switch ensures betterperformance for battery charging system applications. It can deliver up to 1A current to satisfy thebattery supply system. It integrates the over-temperature protection shutdown and auto-recoverycircuit with hysteresis to protect against over current events

    標簽: pw2606b

    上傳時間: 2022-02-11

    上傳用戶:

  • PW2601_2.0.pdf規格書下載

    The PW2601 is a charger front-end integrated circuit designed to provide protection to Li-ionbatteries from failures of charging circuitry. The device monitors the input voltage, battery voltageand the charging current to make sure all three parameters are operated in normal range. Thedevice will switch off internal MOSFET to disconnect IN to OUT to protect load when any of inputvoltage, output current exceeds the threshold. The Over temperature protection (OTP) functionmonitors chip temperature to protect the device. The PW2601 also can protect the system’sbattery from being over charged by monitors the battery voltage continuously. The deviceoperates like a linear regulator, maintaining a 5.1V output with input voltages up to the input overvoltage threshold.The PW2601 is available in DFN-2x2-8L package. Standard products are Pb-free and Halogenfree

    標簽: pw2601

    上傳時間: 2022-02-11

    上傳用戶:

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