網(wǎng)站后臺(tái)管理系統(tǒng)cms一個(gè)開源的系統(tǒng) 希望能給大家提供更好的服務(wù)
標(biāo)簽： cms 網(wǎng)站 后臺(tái) 管理系統(tǒng)
上傳時(shí)間： 2013-12-27
上傳用戶：66666
CMS 1、增加子站點(diǎn)功能，用戶可以自助建站，管理員可以在后臺(tái)對(duì)子站點(diǎn)統(tǒng)一管理，子站點(diǎn)可以映射二級(jí)域名 2、增加不需要webedit控件就能發(fā)布、編輯文章的方式，原來的WEBEDIT控件發(fā)布方式改稱為“高級(jí)方式” 3、增加Flash管理，發(fā)表文章時(shí)，可以直接點(diǎn)擊編輯器中的插入Flash按鈕，選取Flash 4、后臺(tái)增加“文章目錄權(quán)限”，使文章目錄的權(quán)限便于管理 5、首頁管理采用新的模板標(biāo)簽語法，對(duì)JS提取功能作了進(jìn)一步的完善，詳見文檔及cwbbs/js.jsp 6、后臺(tái)管理的若干優(yōu)化 7、增加投稿功能
上傳時(shí)間： 2016-10-18
上傳用戶：王慶才
3D Statistical shape analysis by SHPARM method: code and paper. From the top group at UNC.
標(biāo)簽： Statistical analysis SHPARM method
上傳時(shí)間： 2016-10-20
上傳用戶：wfl_yy
Java powered CMS Framework
標(biāo)簽： Framework powered Java CMS
上傳時(shí)間： 2016-10-24
上傳用戶：silenthink
iic總線控制器VHDL實(shí)現(xiàn) -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist
標(biāo)簽： VHDL c_control vhd control
上傳時(shí)間： 2016-10-30
上傳用戶：woshiayin
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2014-01-20
上傳用戶：三人用菜
這是一個(gè)內(nèi)容管理系統(tǒng)（CMS）以MVC方式寫出,沒有使用框架
標(biāo)簽： CMS MVC 管理系統(tǒng) 方式
上傳時(shí)間： 2013-12-18
上傳用戶：star_in_rain
The DSKs or eZdspTM LF2407 and the DMC1500 make up a table top motor development system which allows engineers and software developers to evaluate certain characteristics of the TMS320F240, TMS320F243, and TMS320LF2407 DSPs to determine if the processor meets the designers application requirements. Evaluators can create software to execute onboard or expand the system in a variety of ways.
標(biāo)簽： development eZdspTM system allow
上傳時(shí)間： 2013-12-24
上傳用戶：zhuoying119
一個(gè)實(shí)用的CMS管理，內(nèi)有數(shù)據(jù)庫的SQL，先建數(shù)據(jù)庫，再進(jìn)行使用
標(biāo)簽： CMS
上傳時(shí)間： 2013-12-19
上傳用戶：趙云興
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
