Two-Dimensional PCA: A New Approach to Appearance-Based Face Representation and Recognition
標簽： Appearance-Based Two-Dimensional Representation Recognition
上傳時間： 2013-12-21
上傳用戶：aa54
T9 Text Input You can use this source code for input T9 Text Input(English)
上傳時間： 2013-12-18
上傳用戶：aysyzxzm
Here are two newest published articles talking about joint source channel coding, in which source coding is invovled scalable video coding. They are very useful for people who are doing research about it.
標簽： source published articles channel
上傳時間： 2013-12-03
上傳用戶：1427796291
外國人開發的電磁時域有限差分方法工具包 Electromagnetic Finite-Difference Time-Domain (EmFDTD) is a basic two-dimensional FDTD code developed at the School of Electrical Engineering, Sharif University of Technology. This code has been written based on the standard Yee s FDTD algorithm. Applications include propagation, scattering, and diffraction of electromagnetic waves in homogeneous and non-homogeneous isotropic media for in-plane propagating waves. Negative permittivites or permeabilities as well as dispersion is not included. Zero, Periodic, and Perfectly Matched Layer boundary conditions may be selectively applied to the solution domain. The program is best suited for study of propagation and diffraction of electromagnetic waves in Photonic Crystal structures. EmFDTD is written in MATLAB language and has been tested under MATLAB 5.0 and higher versions.
標簽： Finite-Difference Electromagnetic two-dimensio Time-Domain
上傳時間： 2014-11-24
上傳用戶：watch100
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標簽： bus bidirectional primarily designed
上傳時間： 2013-12-11
上傳用戶：jeffery
input code control please see
上傳時間： 2016-10-21
上傳用戶：er1219
TL062/TL064 MOTOROLA開發的low power JFET input operational amplifiers
標簽： operational amplifiers MOTOROLA input
上傳時間： 2016-10-24
上傳用戶：hwl453472107
simulating a convolutional encoder allows the user to input a source code to be encoded and also input the values of the generator polynomials. It outputs the encoded data bits, where 1/n is the code rate
標簽： convolutional simulating encoder encoded
上傳時間： 2013-12-21
上傳用戶：253189838
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2014-01-20
上傳用戶：三人用菜
