This document describes how to switch to and program the unisersal serial bus (USB)
analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example
assembly programs for programming and switching to and from the APLL are also
provided in the attached zip file. It is assumed that the reader is familiar with the use
and operation of the C5506/C5507/C5509A USB digital phase-locked loop (DPLL) and
C55x™ Digital Signal Processor (DSP) IDLE procedures.
Bootloading the TMS320VC5506/C5507/C5509 A digital signal processor (DSP)
through the on-chip universal serial bus (USB) peripheral is part of the standard
bootloader provided on the device. This document describes the procedures for
physically connecting the DSP to a USB host, invoking the USB bootloader on the
DSP, generating the correct boot table file, and downloading the boot table from the
host to the DSP via USB.
Although some FX1-based devices may use the FX1鈥檚 CPU
to process USB data directly (Port I/O Mode), most applica-
tions use the FX1 simply as a conduit between the USB and
external data-processing logic (e.g., an ASIC or DSP, or the
IDE controller on a hard disk drive).
