The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator software, and design implementation tools. Through hands-on exercises, you will implement a design from algorithm concept to Verification.
標(biāo)簽： introduction workshop provides advanced
上傳時(shí)間： 2014-12-06
上傳用戶：sammi
Introduction to SPW (signal processing workbench): basic, toolbox, optional libraries, optional Verification environment
標(biāo)簽： optional Introduction processing libraries
上傳時(shí)間： 2014-12-04
上傳用戶：從此走出陰霾
Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design Verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.
標(biāo)簽： Testbenches enabling integral process
上傳時(shí)間： 2014-01-25
上傳用戶：ynzfm
3.1 Data Link Layer Design Issues 3.2 Error Detection and Correction 3.3 Elementary Data Link Protocols 3.4 Sliding Windows Protocols 3.5 Protocol Specification and Verification 3.6 Example Data Link Protocols
標(biāo)簽： Data Link Correction Elementary
上傳時(shí)間： 2016-03-05
上傳用戶：sz_hjbf
Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design Verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.
標(biāo)簽： Testbenches enabling integral process
上傳時(shí)間： 2016-03-24
上傳用戶：1109003457
In the field of biometrics, palmprint is a novel but promising technology. Limited work has been reported on palmprint identification and Verification, despite the importance of palmprint features. There are many unique features in a palmprint image that can be used for personal identification. Principal lines, wrinkles, ridges, minutiae points, singular points, and texture are regarded as useful features for palmprint representation.
標(biāo)簽： biometrics technology palmprint promising
上傳時(shí)間： 2016-04-02
上傳用戶：duoshen1989
Programs in the irregular grid design package described in this manual are used to carry out five main functions: Verification and adjustment of coastline and bathymetric data preparation of an irregular triangular depth grid covering the domain to be modelled production of a preliminary irregular triangular model grid with nodes suitably positioned for accurate and efficient numerical modelling interactive checking and editing, including trimming and joining, of model grid display and plotting of model output.
標(biāo)簽： described irregular Programs package
上傳時(shí)間： 2016-04-09
上傳用戶：fnhhs
編寫testbench的超好教程，網(wǎng)上這種資料比較少。(Kluwer) Writing Testbenches--Functional Verification of HDL Models.pdf
上傳時(shí)間： 2014-01-05
上傳用戶：Miyuki
The package contains a Reed-Solomon coding and decoding program, derived partly from Phil Karn/Robert Morelos-Zaragoza "new_rs_erasures.c". In particular the Berlekamp-Massey algorithm has not been modified. New features compared to "new_rs_erasures.c" are: - fully parameterized: code parameters (n,k,m) can be selected via command line options. - decoding optional by Euclid or Belekamp-Massey algorithm - efficient support of shortened codes - extensive verbose levels for hardware Verification
標(biāo)簽： Reed-Solomon contains decoding package
上傳時(shí)間： 2013-12-11
上傳用戶：shinesyh
Atmel’s AT91SAM7FP105 is a low pincount FingerChip processor based on the 32-bit ARM RISC processor. It features a on-chip biometric engine performing enrollment Verification and identification, an internal record cache of up to 25 records and a secure command protocol over USB, SPI, UART. This protocol enables an external host system or processor to control the onchip bioengine functions, manipulate the record cache, and securely export record cache records for external storage. Together with the FingerChip sensor device AT77C104B, it forms an embedded, secured biometric turnkey solution.
標(biāo)簽： processor FingerChip pincount Atmel
上傳時(shí)間： 2013-12-26
上傳用戶：shawvi
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