為了使車流在交通路口順暢通過,通常需要統計一個交通信號燈周期內的車流量,以實現交通信號燈的自動配時。文中提出了一種交通路口的車流量檢測算法。通過在道路前方設置檢測線,進而統計檢測線灰度變化的情況,即可統計出通過的車流量。并對其進行FPGA的硬件仿真。實驗結果表明,此方法實現簡單,運算處理速度快,能夠得到較滿意的結果。
上傳時間: 2013-10-12
上傳用戶:1406054127
在FPGA平臺上實現了一種溫度模糊控制器,首先對模糊控制系統的思想和工作原理進行了分析,然后使用Quartus ii和modelsim對整個系統進行設計和仿真,最后在FPGA中實現。結果表明,該模糊控制系統設計可行,并可應用到工業控制中。
上傳時間: 2014-12-28
上傳用戶:kernor
為滿足對彈載雷達回波信號、圖像及遙測數據的高速、高容量、遠距離、低功耗、高可靠性等特點的要求。地面測試臺采用LVDS接口,運用FPGA對雷達獲取信號數據進行處理與存儲,通過USB接口將數據上傳到計算機實現數據分析與實驗。實驗結果表明,該方案的傳輸速率600 MBps,很好的滿足了對雷達獲取信號的數據發送和接收的速度要求。
上傳時間: 2013-10-17
上傳用戶:1184599859
設計采用Altera公司CycloneII系列EP2C5Q208作為核心器件,采用直接數字頻率合成技術實現了一個頻率、相位可控的基本信號發生器。該信號發生器可以產生正弦波、方波、三角波和鋸齒波四種波形。仿真及硬件驗證的結果表明,該信號發生器精度高,抗干擾性好,此設計方案具有一定的實用性。
上傳時間: 2013-11-10
上傳用戶:農藥鋒6
介紹了符合CCSDS標準的RS(255,223)碼譯碼器的硬件實現結構。譯碼器采用8位并行時域譯碼算法,主要包括了修正后的無逆BM迭代譯碼算法,錢搜索算法和Forney算法。采用了三級流水線結構實現,減小了譯碼器的時延,提高了譯碼的速率,使用了VHDL語言完成譯碼器的設計與實現。測試表明,該譯碼器性能優良,適用于高速通信。
上傳時間: 2013-10-17
上傳用戶:cc1915
隨著數字音頻技術的不斷發展,數字化音頻設備已廣泛應用于廣播電視節目領域。鑒于專業數字音頻設備越來越多地需求,以及專用接收發送設備的復雜性,本設計采用Philips公司的ARM7控制芯片LPC2138結合音響設備專用芯片,設計一個簡單的AES/EBU(AES3)數字音頻收發系統,實現了專業AES3數字音頻的接收與發送。實驗顯示,在輸入1 kHz,24 dBu時,本設計的總諧波失真小于0.005%,信噪比大于90 dBu。
上傳時間: 2013-11-11
上傳用戶:ruan2570406
針對嵌入式機器視覺系統向獨立化、智能化發展的要求,介紹了一種嵌入式視覺系統--智能相機。基于對智能相機體系結構、組成模塊和圖像采集、傳輸和處理技術的分析,對國內外的幾款智能相機進行比較。綜合技術發展現狀,提出基于FPGA+DSP模式的硬件平臺,并提出智能相機的發展方向。分析結果表明,該系統設計可以實現脫離PC運行,完成圖像獲取與分析,并作出相應輸出。 Abstract: This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.
上傳時間: 2013-10-24
上傳用戶:bvdragon
針對傳統集成電路(ASIC)功能固定、升級困難等缺點,利用FPGA實現了擴頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實現NCO模塊,在下變頻模塊調用了硬核乘法器并引入CIC濾波器進行低通濾波,給出了DQPSK解調的原理和實現方法,推導出一種簡便的引入?仔/4固定相移的實現方法。采用模塊化的設計方法使用VHDL語言編寫出源程序,在Virtex-II Pro 開發板上成功實現了整個系統。測試結果表明該系統正確實現了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上傳時間: 2013-11-06
上傳用戶:liu123
為了在CDMA系統中更好地應用QDPSK數字調制方式,在分析四相相對移相(QDPSK)信號調制解調原理的基礎上,設計了一種QDPSK調制解調電路,它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上,進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中,測試結果表明,調制電路能正確選相,解調電路輸出數據與QDPSK調制輸入數據完全一致,達到了預期的設計要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
上傳時間: 2014-01-13
上傳用戶:qoovoop
波長信號的解調是實現光纖光柵傳感網絡的關鍵,基于現有的光纖光柵傳感器解調方法,提出一種基于FPGA的雙匹配光纖光柵解調方法,此系統是一種高速率、高精度、低成本的解調系統,并且通過引入雙匹配光柵有效地克服了雙值問題同時擴大了檢測范圍。分析了光纖光柵的測溫原理并給出了該方案軟硬件設計,綜合考慮系統的解調精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.
上傳時間: 2014-07-24
上傳用戶:caiguoqing