批處理感知器算法的代碼matlab
w1=[1,0.1,1.1;1,6.8,7.1;1,-3.5,-4.1;1,2.0,2.7;1,4.1,2.8;1,3.1,5.0;1,-0.8,-1.3;
1,0.9,1.2;1,5.0,6.4;1,3.9,4.0];
w2=[1,7.1,4.2;1,-1.4,-4.3;1,4.5,0.0;1,6.3,1.6;1,4.2,1.9;1,1.4,-3.2;1,2.4,-4.0;
1,2.5,-6.1;1,8.4,3.7;1,4.1,-2.2];
w3=[1,-3.0,-2.9;1,0.5,8.7;1,2.9,2.1;1,-0.1,5.2;1,-4.0,2.2;1,-1.3,3.7;1,-3.4,6.2;
1,-4.1,3.4;1,-5.1,1.6;1,1.9,5.1];
figure;
plot(w3(:,2),w3(:,3),'ro');
hold on;
plot(w2(:,2),w2(:,3),'b+');
W=[w2;-w3];%增廣樣本規范化
a=[0,0,0];
k=0;%記錄步數
n=1;
y=zeros(size(W,2),1);%記錄錯分的樣本
while any(y<=0)
k=k+1;
y=a*transpose(W);%記錄錯分的樣本
a=a+sum(W(find(y<=0),:));%更新a
if k >= 250
break
end
end
if k<250
disp(['a為：',num2str(a)])
disp(['k為：',num2str(k)])
else
disp(['在250步以內沒有收斂，終止'])
end
%判決面：x2=-a2*X1/a3-a1/a3
xmin=min(min(w1(:,2)),min(w2(:,2)));
xmax=max(max(w1(:,2)),max(w2(:,2)));
x=xmin-1:xmax+1;%(xmax-xmin):
y=-a(2)*x/a(3)-a(1)/a(3);
plot(x,y)
標簽：
批處理
算法matlab
上傳時間：
2016-11-07
上傳用戶：a1241314660
黑金CYCLONE4 EP4CE6F17C8 FPGA開發板ALTIUM設計硬件工程（原理圖+PCB+AD集成封裝庫）,Altium Designer 設計的工程文件，包括完整的原理圖及PCB文件，可以用Altium(AD)軟件打開或修改，可作為你產品設計的參考。集成封裝器件型號列表：Library Component Count : 50Name Description----------------------------------------------------------------------------------------------------1117-3.3 24LC04B_0 4148 BAV99 CAP NP_Dup2CAP NP_Dup2_1 CAP NP_Dup2_2CP2102_0 C_Dup1 C_Dup1_1C_Dup2 C_Dup3 C_Dup4 C_Dup4_1 Circuit Breaker Circuit BreakerConnector 15 Receptacle Assembly, 15-Pin, Sim Line ConnectorDS1302_8SO EC EP4CE6F17C8 Cyclone IV Family FPGA, 2V Core, 179 I/O Pins, 2 PLLs, 256-Pin FBGA, Speed Grade 8, Commercial GradeEP4CE6F17C8_1 Cyclone IV Family FPGA, 2V Core, 179 I/O Pins, 2 PLLs, 256-Pin FBGA, Speed Grade 8, Commercial GradeFuse 2 FuseHEX6HY57651620/SO_0 Header 2 Header, 2-PinHeader 9X2 Header, 9-Pin, Dual rowINDUCTOR JTAG-10_Dup1 KEYB LED LED_Dup1 M25P16-VMN3PB 16 Mb (X1) Automotive Serial NOR Flash Memory, 75 MHz, 2.7 to 3.6 V, 8-pin SO8 Narrow (MN), TubeMHDR2X20 Header, 20-Pin, Dual rowMiniUSBB OSCPNP R RESISTOR RN RN_Dup1 R_Dup1 R_Dup2 R_Dup3 R_Dup5R_Dup6 SD SPEAKERSRV05-4SW KEY-DPDT ZTAbattery
標簽：
黑金
cyclone4
ep4ce6f17c8
fpga
上傳時間：
2021-12-22
上傳用戶：
