實(shí)驗(yàn)1：Xilinx軟件平臺(tái)設(shè)計(jì)流程實(shí)驗(yàn) Spartan-3E目標(biāo)板的初學(xué)者組件 by Picoblaze
標(biāo)簽： Picoblaze Spartan Xilinx 實(shí)驗(yàn)
上傳時(shí)間： 2016-02-07
上傳用戶：離殤
利用VERILOG編寫的基于XILINX的SPARTAN板的VGA接口顯示程序
標(biāo)簽： VERILOG SPARTAN XILINX VGA
上傳時(shí)間： 2013-12-21
上傳用戶：yyq123456789
Xilinx可編程邏輯器件的高級(jí)應(yīng)用與設(shè)計(jì)技巧 全面介紹Xilinx的CoolRunnerII Spartan-3 Virtex-II VirtexII pro等器件的結(jié)構(gòu)特性，以及ISE6及其輔助設(shè)計(jì)工具。
標(biāo)簽： Xilinx CoolRunnerII Virtex-II VirtexII
上傳時(shí)間： 2017-02-18
上傳用戶：sz_hjbf
Xilinx公司推出的Spartan-3E入門實(shí)驗(yàn)板 用戶指南
標(biāo)簽： Spartan Xilinx 實(shí)驗(yàn)板 用戶
上傳時(shí)間： 2014-01-01
上傳用戶：xauthu
spartan 3 hardware reference document xilinx
標(biāo)簽： reference hardware document spartan
上傳時(shí)間： 2014-08-28
上傳用戶：大融融rr
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標(biāo)簽： Spartan-DSP Virtex FPGAs Ap
上傳時(shí)間： 2013-10-23
上傳用戶：raron1989
FPGA 具有輕松集成與支持新協(xié)議和新標(biāo)準(zhǔn)以及產(chǎn)品定制的能力，同時(shí)仍然可以實(shí)現(xiàn)快速的產(chǎn)品面市時(shí)間。在互聯(lián)網(wǎng)和全球市場(chǎng)環(huán)境中，外包制造變得越來越普遍，這使得安全變得更加重要。正如業(yè)界領(lǐng)袖出版的文章所述，反向工程、克隆、過度構(gòu)建以及篡改已經(jīng)成為主要的安全問題。據(jù)專家估計(jì)，每年因?yàn)榧倜爱a(chǎn)品而造成的經(jīng)濟(jì)損失達(dá)數(shù)十億美元。國(guó)際反盜版聯(lián)盟表示，這些假冒產(chǎn)品威脅經(jīng)濟(jì)的發(fā)展，并且給全球的消費(fèi)類市場(chǎng)帶來重大影響。本白皮書將確定設(shè)計(jì)安全所面臨的主要威脅，探討高級(jí)安全選擇，并且介紹Xilinx 的新型、低成本SpartanTM-3A、Spartan-3AN 和Spartan-3A DSP FPGA 如何協(xié)助保護(hù)您的產(chǎn)品和利潤(rùn)。
標(biāo)簽： Spartan FPGA 267 DSP
上傳時(shí)間： 2014-12-28
上傳用戶：松毓336
Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express mode signals and their associated timing are defined.The steps of Express configuration are described in detail, followed by detailed instructions thatshow how to implement the configuration circui
標(biāo)簽： Spartan-XL Express XAPP FPGA
上傳時(shí)間： 2014-12-28
上傳用戶：hewenzhi
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.
上傳時(shí)間： 2013-10-22
上傳用戶：liu999666
Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express mode signals and their associated timing are defined.The steps of Express configuration are described in detail, followed by detailed instructions thatshow how to implement the configuration circui
標(biāo)簽： Spartan-XL Express XAPP FPGA
上傳時(shí)間： 2015-01-02
上傳用戶：nanxia
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