PICKIT™ 2 PROGRAMMER-TO-GO USER GUIDE The PICkit 2 Programmer-To-Go functionality allows a PIC MCU memory image to be downloaded into the PICkit 2 unit for later programming into a specific PIC MCU. No software or PC is required to program devices once the PICkit 2 unit is set up for Programming-To-Go. A USB power source for the PICkit 2 is all that is needed.
標簽： PROGRAMMER-TO PICKIT 8482
上傳時間： 2013-10-29
上傳用戶：ca05991270
at91rm9200啟動過程教程 系統(tǒng)上電，檢測BMS，選擇系統(tǒng)的啟動方式，如果BMS為高電平，則系統(tǒng)從片內ROM啟動。AT91RM9200的ROM上電后被映射到了0x0和0x100000處，在這兩個地址處都可以訪問到ROM。由于9200的ROM中固化了一個BOOTLOAER程序。所以PC從0X0處開始執(zhí)行這個BOOTLOAER(準確的說應該是一級BOOTLOADER)。這個BOOTLOER依次完成以下步驟： 1、PLL SETUP，設置PLLB產生48M時鐘頻率提供給USB DEVICE。同時DEBUG USART也被初始化為48M的時鐘頻率； 2、相應模式下的堆棧設置； 3、檢測主時鐘源（Main oscillator）； 4、中斷控制器（AIC）的設置； 5、C 變量的初始化； 6、跳到主函數。 完成以上步驟后，我們可以認為BOOT過程結束，接下來的就是LOADER的過程，或者也可以認為是裝載二級BOOTLOER。AT91RM9200按照DATAFLASH、EEPROM、連接在外部總線上的8位并行FLASH的順序依次來找合法的BOOT程序。所謂合法的指的是在這些存儲設備的開始地址處連續(xù)的存放的32個字節(jié)，也就是8條指令必須是跳轉指令或者裝載PC的指令，其實這樣規(guī)定就是把這8條指令當作是異常向量表來處理。必須注意的是第6條指令要包含將要裝載的映像的大小。關于如何計算和寫這條指令可以參考用戶手冊。一旦合法的映像找到之后，則BOOT程序會把找到的映像搬到SRAM中去，所以映像的大小是非常有限的，不能超過16K-3K的大小。當BOOT程序完成了把合法的映像搬到SRAM的任務以后，接下來就進行存儲器的REMAP，經過REMAP之后，SRAM從映設前的0X200000地址處被映設到了0X0地址并且程序從0X0處開始執(zhí)行。而ROM這時只能在0X100000這個地址處看到了。至此9200就算完成了一種形式的啟動過程。如果BOOT程序在以上所列的幾種存儲設備中找到合法的映像，則自動初始化DEBUG USART口和USB DEVICE口以準備從外部載入映像。對DEBUG口的初始化包括設置參數115200 8 N 1以及運行XMODEM協(xié)議。對USB DEVICE進行初始化以及運行DFU協(xié)議。現在用戶可以從外部（假定為PC平臺）載入你的映像了。在PC平臺下，以WIN2000為例，你可以用超級終端來完成這個功能，但是還是要注意你的映像的大小不能超過13K。一旦正確從外部裝載了映像，接下來的過程就是和前面一樣重映設然后執(zhí)行映像了。我們上面講了BMS為高電平，AT91RM9200選擇從片內的ROM啟動的一個過程。如果BMS為低電平，則AT91RM9200會從片外的FLASH啟動，這時片外的FLASH的起始地址就是0X0了，接下來的過程和片內啟動的過程是一樣的，只不過這時就需要自己寫啟動代碼了，至于怎么寫，大致的內容和ROM的BOOT差不多，不同的硬件設計可能有不一樣的地方，但基本的都是一樣的。由于片外FLASH可以設計的大，所以這里編寫的BOOTLOADER可以一步到位，也就是說不用像片內啟動可能需要BOOT好幾級了，目前AT91RM9200上使用較多的bootloer是u-boot，這是一個開放源代碼的軟件，用戶可以自由下載并根據自己的應用配置。總的說來，筆者以為AT91RM9200的啟動過程比較簡單，ATMEL的服務也不錯，不但提供了片內啟動的功能，還提供了UBOOT可供下載。筆者寫了一個BOOTLODER從片外的FLASHA啟動，效果還可以。 uboot結構與使用uboot是一個龐大的公開源碼的軟件。他支持一些系列的arm體系，包含常見的外設的驅動，是一個功能強大的板極支持包。其代碼可以 http://sourceforge.net/projects/u-boot下載 在9200上，為了啟動uboot，還有兩個boot軟件包，分別是loader和boot。分別完成從sram和flash中的一級boot。其源碼可以從atmel的官方網站下載。 我們知道，當9200系統(tǒng)上電后，如果bms為高電平，則系統(tǒng)從片內rom啟動，這時rom中固化的boot程序初始化了debug口并向其發(fā)送'c'，這時我們打開超級終端會看到ccccc...。這說明系統(tǒng)已經啟動，同時xmodem協(xié)議已經啟動，用戶可以通過超級終端下載用戶的bootloader。作為第一步，我們下載loader.bin.loader.bin將被下載到片內的sram中。這個loder完成的功能主要是初始化時鐘，sdram和xmodem協(xié)議，為下載和啟動uboot做準備。當下載了loader.bin后，超級終端會繼續(xù)打印：ccccc....。這時我們就可以下在uboot了。uboot將被下載到sdram中的一個地址后并把pc指針調到此處開始執(zhí)行uboot。接著我們就可以在終端上看到uboot的shell啟動了，提示符uboot>，用戶可以uboot>help 看到命令列表和大概的功能。uboot的命令包含了對內存、flash、網絡、系統(tǒng)啟動等一些命令。 如果系統(tǒng)上電時bms為低電平，則系統(tǒng)從片外的flash啟動。為了從片外的flash啟動uboot,我們必須把boot.bin放到0x0地址出，使得從flash啟動后首先執(zhí)行boot.bin，而要少些boot.bin，就要先完成上面我們講的那些步驟，首先開始從片內rom啟動uboot。然后再利用uboot的功能完成把boot.bin和uboot.gz燒寫到flash中的目的，假如我們已經啟動了uboot,可以這樣操作： uboot>protect off all uboot>erase all uboot>loadb 20000000 uboot>cp.b 20000000 10000000 5fff uboot>loadb 21000000 uboot>cp.b 210000000 10010000 ffff 然后系統(tǒng)復位，就可以看到系統(tǒng)先啟動boot，然后解壓縮uboot.gz，然后啟動uboot。注意，這里uboot必須壓縮成.gz文件，否則會出錯。 怎么編譯這三個源碼包呢，首先要建立一個arm的交叉編譯環(huán)境，關于如何建立，此處不予說明。建立好了以后，分別解壓源碼包，然后修改Makefile中的編譯器項目，正確填寫你的編譯器的所在路徑。 對loader和boot，直接make。對uboot,第一步：make_at91rm9200dk,第二步：make。這樣就會在當前目錄下分別生成*.bin文件,對于uboot.bin，我們還要壓縮成.gz文件。 也許有的人對loader和boot搞不清楚為什么要兩個，有什么區(qū)別嗎？首先有區(qū)別，boot主要完成從flash中啟動uboot的功能，他要對uboot的壓縮文件進行解壓，除此之外，他和loader并無大的區(qū)別，你可以把boot理解為在loader的基礎上加入了解壓縮.gz的功能而已。所以這兩個并無多大的本質不同，只是他們的使命不同而已。 特別說名的是這三個軟件包都是開放源碼的，所以用戶可以根據自己的系統(tǒng)的情況修改和配置以及裁減，打造屬于自己系統(tǒng)的bootloder。
上傳時間： 2013-10-27
上傳用戶：wsf950131
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上傳時間： 2013-10-13
上傳用戶：13162218709
匯編器在微處理器的驗證和應用中舉足輕重，如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統(tǒng)設計思想，在匯編語言與機器語言間插入中間代碼CMDL（code mapping description language）語言，打破匯編語言與機器語言的直接映射關系，由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發(fā)了一套匯編器系統(tǒng)，具有較高層次上的通用性和可移植性。【關鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their productsor to discontinue any product or service without notice, and advise customers to obtain the latestversion of relevant information to verify, before placing orders, that information being relied onis current and complete. All products are sold subject to the terms and conditions of sale suppliedat the time of order acknowledgement, including those pertaining to warranty, patentinfringement, and limitation of liability.
標簽： Assembly Language C6000 320C
上傳時間： 2013-11-12
上傳用戶：chens000
The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
上傳時間： 2013-11-21
上傳用戶：q123321
The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
標簽： translating Level 9517 PCA
上傳時間： 2013-12-25
上傳用戶：wsf950131
The PCA9518 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both thedata (SDA) and the clock (SCL) lines, thus enabling virtuallyunlimited buses of 400 pF.
標簽： Expandable 5channel 9518 PCA
上傳時間： 2013-10-23
上傳用戶：dumplin9
The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBusmaximum capacitance of 400 pF on the higher voltage side. The SDA and SCL pins areover-voltage tolerant and are high-impedance when the PCA9519 is unpowered.
標簽： 4channel transla level 9519
上傳時間： 2013-11-19
上傳用戶：jisiwole
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
上傳時間： 2014-11-22
上傳用戶：xcy122677
