Single chip TFT-LCD Controller/Driver with On-chip Frame Memory (FM) Display Resolution: 240*RGB (H) *320(V) Frame Memory Size: 240 x 320 x 18-bit = 1,382,400 bits LCD Driver Output Circuits- Source Outputs: 240 RGB Channels- Gate Outputs: 320 Channels- Common Electrode Output Display Colors (Color Mode)- Full Color: 262K, RGB=(666) max., Idle Mode Off- Color Reduce: 8-color, RGB=(111), Idle Mode On Programmable Pixel Color Format (Color Depth) for Various Display Data input Format- 12-bit/pixel: RGB=(444)- 16-bit/pixel: RGB=(565)- 18-bit/pixel: RGB=(666) MCU Interface- Parallel 8080-series MCU Interface (8-bit, 9-bit, 16-bit & 18-bit)- 6/16/18 RGB Interface(VSYNC, HSYNC, DOTCLK, ENABLE, DB[17:0])- Serial Peripheral Interface(SPI Interface)- VSYNC Interface
上傳時(shí)間： 2022-03-04
上傳用戶(hù)：
ADC模數(shù)轉(zhuǎn)換器件Altium Designer AD原理圖庫(kù)元件庫(kù)SV text has been written to file : 4.4 - ADC模數(shù)轉(zhuǎn)換器件.csvLibrary Component Count : 29Name Description----------------------------------------------------------------------------------------------------ADC0800 National 8-Bit Analog to Digital ConverterADC0809 ADC0831 ADCADC0832 ADC8 Generic 8-Bit A/D ConverterCLC532 High-Speed 2:1 Analog MultiplexerCS5511 National 16-Bit Analog to Digital ConverterDAC8 Generic 8-Bit D/A ConverterEL1501 Differential line Driver/ReceiverEL2082 Current-Mode MultiplierEL4083 Current Mode Four Quadrant MultiplierEL4089 DC Restored Video AmplifierEL4094 Video Gain Control/FaderEL4095 Video Gain Contol/Fader/MultiplexerICL7106 LMC6953_NSC PCI Local Bus Power SupervisorMAX4147 300MHz, Low-Power, High-Output-Current, Differential Line DriverMAX4158 350MHz 2-Channel Video Multiplexer-AmplifierMAX4159 350MHz 2-Channel Video Multiplexer-AmplifierMAX4258 250MHz, 2-Channel Video Multiplexer-AmplifierMAX4259 250MHz 2-Channel Video Multiplexer-AmplifierMAX951 Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMAX952 Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMC1496 Balanced Modulator/DemodulatorPLL100k Generic Phase Locked LoopPLL10k Generic Phase Locked LoopPLL5k Generic Phase Locked LoopPLLx Generic Phase Locked Loop水位計(jì)
標(biāo)簽： adc 模數(shù)轉(zhuǎn)換 altium designer
上傳時(shí)間： 2022-03-13
上傳用戶(hù)：
配電網(wǎng)中,各種配電終端的電流、電壓、有功功率及無(wú)功功率等模擬量的采集是配電網(wǎng)自動(dòng)化的重要環(huán)節(jié)。這些模擬量的采集也是各種儀器和家用電器的必要功能。因此,設(shè)計(jì)了基于嵌入式STM32F103單片機(jī)的交流電壓、交流電流及有功功率的采集系統(tǒng),通過(guò)電壓互感器TV1005M和電流互感器TA1005M分別檢測(cè)交流電壓和交流電流值;屏幕或者手機(jī)APP和WiFi模塊互聯(lián)后,可以實(shí)時(shí)顯示交流電壓、交流電流、功率及電量值;通過(guò)設(shè)定閾值功率,可以實(shí)現(xiàn)對(duì)電流的監(jiān)控和對(duì)電路的保護(hù)。In the distribution network,the collection of analog,such as current,voltage,active power,and reactive power at various distribution terminals is a very important part of distribution network automation. These analog acquisitions are also for various instruments and household appliances. Very important technology. Therefore,an AC voltage,AC current and active power acquisition system based on embedded STM32 F103 machine is designed,and AC voltage and AC current values are detected by voltage transformer TV1005 M and current Transformer TA1005 M respectively;After the screen or mobile phone APP and WiFi modules are interconnected,AC voltage,AC current,power,and power values can be displayed in real time;By setting the threshold power,the current can be monitored and the circuit can be protected.
標(biāo)簽： stm32f103 單片機(jī) 電流電壓采集
上傳時(shí)間： 2022-03-27
上傳用戶(hù)：shjgzh
數(shù)字示波器功能強(qiáng)大,使用方便,但是價(jià)格相對(duì)昂貴。本文以Ti的MSP430F5529為主控器,以Altera公司的EP2C5T144C8 FPGA器件為邏輯控制部件設(shè)計(jì)數(shù)字示波器。模擬信號(hào)經(jīng)程控放大、整形電路后形成方波信號(hào)送至FPGA測(cè)頻,根據(jù)頻率值選擇采用片上及片外高速AD分段采樣。FPGA控制片外AD采樣并將數(shù)據(jù)輸入到FIFO模塊中緩存,由單片機(jī)進(jìn)行頻譜分析。測(cè)試表明:簡(jiǎn)易示波器可以實(shí)現(xiàn)自動(dòng)選檔、多采樣率采樣、高精度測(cè)頻及頻譜分析等功能。Digital oscilloscope is powerful and easy to use, but also expensive. The research group designed a low-cost digital oscilloscope, the chip of MSP430F5529 of TI is chosen as the main controller and the device of EP2C5T144C8 of Altera company is used as the logic control unit. Analog signal enter the programmable amplifier circuit, shaping circuit and other pre-processing circuit. The shaped rectangular wave signal is sent to FPGA for measure the frequency. According to the frequency value to select AD on-chip or off-chip high-speed AD for sampling. FPGA controls the off-chip AD sampling and buffers AD data by FIFO module. The single chip microcomputer receives the data, and do FFT for spectrum analysis. The test shows that the simple oscilloscope can realize automatic gain selection, sampling at different sampling rates, high precision frequency measurement and spectrum analysis.
標(biāo)簽： msp430 單片機(jī) fpga 數(shù)字示波器
上傳時(shí)間： 2022-03-27
上傳用戶(hù)：
在全球氣候變暖和石油資源短缺的形勢(shì)下,推動(dòng)新能源汽車(chē)的發(fā)展將成為汽車(chē)行業(yè)一種新的發(fā)展方向。在大力發(fā)展新能源電動(dòng)汽車(chē)行業(yè)的同時(shí)還應(yīng)兼顧電動(dòng)汽車(chē)充電設(shè)施的發(fā)展,因此對(duì)電動(dòng)汽車(chē)充電樁的設(shè)計(jì)與研究顯得十分必要。對(duì)電動(dòng)汽車(chē)直流充電樁的硬件系統(tǒng)進(jìn)行設(shè)計(jì),主要的硬件電路包括安全監(jiān)測(cè)電路、總壓采集電路、溫濕度檢測(cè)電路、語(yǔ)音電路。軟件包括主要流程圖和溫濕度檢測(cè)流程圖。Under the situation of global warming and shortage of petroleum resources,promoting the development of new energy vehicles will become a new development direction for the automotive industry.While vigorously developing the new energy electric vehicle industry,we should also take into account the development of electric vehicle charging facilities.Therefore,the design and research of electric vehicle charging piles is very necessary.The hardware system of the electric vehicle DC charging pile is designed.The main hardware circuits include safety monitoring circuit,total voltage collecting circuit,temperature and humidity detecting circuit,voice circuit and CAN communication.The software includes a main flow chart and a temperature and humidity detection flow chart.
標(biāo)簽： 電動(dòng)汽車(chē)
上傳時(shí)間： 2022-04-03
上傳用戶(hù)：jason_vip1
電學(xué)中的測(cè)量技術(shù)涉及范圍非常廣,電流測(cè)量在電學(xué)計(jì)量中占有非常重要的位置。如何精確地進(jìn)行電流測(cè)量是精密測(cè)量的一大難題。傳統(tǒng)的電流檢測(cè)電路多采用運(yùn)算放大芯片與片外電流檢測(cè)電路相結(jié)合的方式,電路集成度很低,需要較多的接口和資源才能完成對(duì)電路的檢測(cè)。本文把所有電路部分都集成在一塊芯片上,包括檢測(cè)電阻,運(yùn)算放大器電路及模擬轉(zhuǎn)數(shù)字轉(zhuǎn)換電路,從而在電路內(nèi)部可以進(jìn)行電流檢測(cè),使電路更好的集成化。前置電路使用二級(jí)共源共柵結(jié)構(gòu)的運(yùn)算放大器,減小溝道長(zhǎng)度調(diào)制效應(yīng)造成的電流誤差。10位SAR ADC中采用電容驅(qū)動(dòng)能力強(qiáng)的傳輸門(mén)保證了模數(shù)轉(zhuǎn)化器的有效精度。比較器模塊采用再生鎖存器與遲滯比較器作為基礎(chǔ)單元組合解決精密測(cè)量的問(wèn)題。本設(shè)計(jì)可以作為嵌入芯片內(nèi)的一小部分而檢測(cè)芯片中的微小電流1mA~100mA,工作電壓在1.8v左右,電流檢測(cè)精度預(yù)期達(dá)到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by channel length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.
標(biāo)簽： 電流檢測(cè) 電路 運(yùn)算放大器 adc
上傳時(shí)間： 2022-04-03
上傳用戶(hù)：
高通(Qualcomm)藍(lán)牙芯片QCC5144_硬件設(shè)計(jì)詳細(xì)指導(dǎo)書(shū)（官方內(nèi)部培訓(xùn)手冊(cè)）其內(nèi)容是針對(duì)硬件設(shè)計(jì)、部分重要元器件選擇(ESD，F(xiàn)ilter）及走線(xiàn)注意事項(xiàng)的詳細(xì)說(shuō)明。2 Power management 2.1 SMPS 2.1.1 Components specification 2.1.2 Input power supply selection 92.1.3 Minimize SMPS EMI emissions 2.1.4 Internal LDOs and digital core decoupling 2.1.5 Powering external components 2.2 Charger 2.2.1 Charger connections.2.2.2 General charger operation2.2.3 Temperature measurement during charging 2.3 SYS_CTRL 3 Bluetooth radio3.1 RF PSU component choice 3.2 RF band-pass filter3.3 Layout (天線(xiàn) 走線(xiàn)的注意事項(xiàng))4 Audio4.1 Audio bypass capacitors 4.2 Earphone speaker output4.3 Line/Mic input 4.4 Headphone output optimizition5 LED pads 5.1 LED driver 5.2 Digital/Button input 5.3 Analog input5.4 Disabled 6 Reset pin (Reset#)7 USB interfaces7.1 USB device port7.1.1 USB device port7.1.2 Layout notes 7.1.3 USB charger detectionA QCC5144 VFBGA example schematic and BOM B Recommended SMPS components specificationB.1 Inductor specifition B.2 Recommended inductors B.3 SMPS capacitor specifition
上傳時(shí)間： 2022-04-07
上傳用戶(hù)：默默
高通藍(lán)牙芯片QCC5144 詳細(xì)規(guī)格手冊(cè)datasheet （共99頁(yè)）含各個(gè)接口說(shuō)明，應(yīng)用原理圖等信息。 QualcommTrueWireless? stereo earbuds (無(wú)線(xiàn)雙耳） Features（特點(diǎn)） ■ Qualifiedto Bluetooth v5.2 specification （藍(lán)牙協(xié)議標(biāo)準(zhǔn)5.2） ■ 120 MHz Qualcomm ? Kalimba ? audio DSP （120MHz 的音頻DSP處理器） ■ 32 MHz/80MHz Developer Processor for applications ■ Firmware Processor for system ■ Flexible QSPI flash programmable platform （可編程的QSPI外掛存儲(chǔ)器） ■ High-performance 24?bit audio interface （高性能的24位音頻接口） ■ Digital and analog microphone interfaces （含 數(shù)字 及模擬 MIC接口） ■ Flexible PIO controller and LED pins with PWM support ■ Serial interfaces: UART, Bit Serializer (I2C/SPI), USB 2.0 （支持串口，I2C， SPI，USB 接口） ■ Advanced audio algorithms （高級(jí)的音頻算法） ■ ActiveNoise Cancellation: （支持ANC 主動(dòng)降噪功能） Hybrid, Feedforward, and Feedback modes, using Digital or Analog Mics, enabled using license keys available from Qualcomm? ■ Qualcomm ? aptX ? and aptX HD Audio （支持獨(dú)特的aptx 功能）
上傳時(shí)間： 2022-04-07
上傳用戶(hù)：
高通藍(lán)牙芯片QCC3040 詳細(xì)規(guī)格手冊(cè)datasheet （共96頁(yè)）QualcommTrueWireless? stereo earbuds (無(wú)線(xiàn)雙耳）Features（特點(diǎn)）■ Qualifiedto Bluetooth v5.2 specification （藍(lán)牙協(xié)議標(biāo)準(zhǔn)5.2）■ 120 MHz Qualcomm ? Kalimba ? audio DSP （120MHz 的音頻DSP處理器）■ 32 MHz Developer Processor for applications （32MH的 應(yīng)用處理器）■ Firmware Processor for system■ Flexible QSPI flash programmable platform （可編程的QSPI外掛存儲(chǔ)器）■ High-performance 24?bit audio interface （高性能的24位音頻接口）■ Digital and analog microphone interfaces （含 數(shù)字 及模擬 MIC接口）■ Flexible PIO controller and LED pins with PWM support■ Serial interfaces: UART, Bit Serializer (I2C/SPI), USB 2.0 （支持串口，I2C， SPI，USB 接口）■ Advanced audio algorithms （高級(jí)的音頻算法）■ ActiveNoise Cancellation: （支持ANC 主動(dòng)降噪功能）Hybrid, Feedforward, and Feedback modes, using Digitalor Analog Mics, enabled using license keys available from Qualcomm?■ Qualcomm ? aptX ? and aptX HD Audio （支持獨(dú)特的aptx 功能）
上傳時(shí)間： 2022-04-09
上傳用戶(hù)：slq1234567890
為了提高超高頻RFID系統(tǒng)中閱讀器在低信噪比的情況下仍具有較高的識(shí)別能力,提出一種基于FPGA系統(tǒng)結(jié)合軟件無(wú)線(xiàn)電方法實(shí)現(xiàn)超高頻RFID射頻前端電路方案。超高頻射頻識(shí)別系統(tǒng)必須符合EPC Class 1generation 2標(biāo)準(zhǔn),所設(shè)計(jì)的電路系統(tǒng)以Xilinx公司的XC6SLX16-2CSG324FPGA芯片為硬件基礎(chǔ),將數(shù)字基帶調(diào)制解調(diào)和中頻濾波電路在FPGA系統(tǒng)中設(shè)計(jì)實(shí)現(xiàn),重點(diǎn)闡述了射頻前端電路的設(shè)計(jì)結(jié)構(gòu)、AD/DA轉(zhuǎn)換電路,以及數(shù)字濾波器的設(shè)計(jì)。實(shí)驗(yàn)結(jié)果表明,所設(shè)計(jì)的超高頻RFID閱讀器簡(jiǎn)化了前端電路系統(tǒng)結(jié)構(gòu),提升了穩(wěn)定性,增強(qiáng)了抗干擾能力。該電路系統(tǒng)在信噪比較低的情況下,能夠較好地實(shí)現(xiàn)915MHz頻率的射頻接收和發(fā)送。In order to improve the reader UHF RFID system still has a higher ability to identify,in the case of low signal-to-noise ratio.The UHF RFID systems must comply with EPC Class 1 generation 2 standard.In this paper,the design of the circuit system based on Xilinx＇s XC6SLX16-2CSG324 FPGA chip,and presents UHF RFID RF front-end circuit with software radio based on FPGA system.Digital baseband modem and IF filter circuit is designed and implemented in the FPGA system,and focused on designing the structure of the RF front-end circuit,AD/DA conversion circuits,and digital filter.Experimental results show that the UHF RFID reader de...
標(biāo)簽： 915mhz 超高頻 rfid 閱讀 射頻 前端 電路 設(shè)計(jì)
上傳時(shí)間： 2022-04-17
上傳用戶(hù)：shjgzh
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