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優化數據轉換器接口

The reference voltage, supply voltages, and ground are also important. Section 4 of this book willaddress the issues associated with grounding and decoupling, and this section discusses the ones listedabove.

標簽： 數據轉換器接口

上傳時間： 2014-12-23

上傳用戶：xiaohuanhuan
XAPP983-從 Flash存儲器執行和調試軟件

This document and the associated reference design provide guidance for assigning anddebugging software to or in FLASH memory, specifically for a MicroBlaze™ embeddedprocessor design.

標簽： Flash XAPP 983 存儲器

上傳時間： 2013-11-11

上傳用戶：dgann
簡單的多輸出范圍16位DAC設計

Precision 16-bit analog outputs with softwareconfigurableoutput ranges are often needed in industrialprocess control equipment, analytical and scientificinstruments and automatic test equipment. In the past,designing a universal output module was a daunting taskand the cost and PCB real estate associated with thisfunction were problematic, if not prohibitive.

標簽： DAC 輸出范圍

上傳時間： 2014-12-23

上傳用戶：如果你也聽說
寄生電容在升壓變壓器中的設計應用

One of the most critical components in a step-up design like Figure 1 is the transformer. Transformers have parasitic components that can cause them to deviate from their ideal characteristics, and the parasitic capacitance associated with the secondary can cause large resonating current spikes on the leading edge of the switch current waveform.

標簽： 寄生電容升壓變壓器中的設計

上傳時間： 2013-11-22

上傳用戶：15070202241
DN1011 簡單高效率隔離型反激式電源

While simplicity and high effi ciency (for cool running) areno longer optional features in isolated power supplies, itis traditionally diffi cult to achieve both. Achieving higheffi ciency often requires the use of advanced topologiesand home-brewed secondary synchronous rectifi cationschemes once reserved only for higher power applications.This only adds to the parts count and to the designcomplexity associated with the reference and optocouplercircuits typically used to maintain isolation. Fortunately, abreakthrough IC makes it possible to achieve both high efficiency and simplicity in a synchronous fl yback topology.The LT®3825 simplifi es and improves the performance oflow voltage, high current fl yback supplies by providingprecise synchronous rectifi er timing and eliminating theneed for optocoupler feedback while maintaining excellentregulation and superior loop response.

標簽： 1011 DN 高效率隔離型

上傳時間： 2013-10-16

上傳用戶：wayne595
DN460雙輸出降壓穩壓器優化效率

The LTC3546 is a dual output current mode buck regulatorwith fl exible output current partitioning. Beyondthe advantages normally associated with dual outputregulators (reduced size, cost, EMI and part count, withimproved effi ciency), the LTC3546’s outputs can bepartitioned for either 3A and 1A outputs, or two 2A outputs.This increases its application range and simplifi esmultiple supply rail designs. A confi gurable Burst Mode®clamp for each output sets the current transition levelbetween Burst Mode operation and forced continuousconduction mode to optimize effi ciency over the entireoutput range. An adjustable switching frequency up to4MHz and internal power MOSFET switches allow forsmall and compact footprints.

標簽： 460 DN 輸出優化效率

上傳時間： 2013-11-04

上傳用戶：yxgi5
LT1300和LT1301在功率DCDC轉換器中的應用

The design of battery-powered equipment can often bequite challenging. Since few ICs can operate directly fromthe end-of-life voltage from a 2-cell battery (about 1.8V),most systems require a DC/DCconverter. The systemdesigner often has a limited area in which to place the DC/DC converter; associated inductors and capacitors must be

標簽： LT 1300 1301 DCDC

上傳時間： 2013-11-23

上傳用戶：wys0120
XAPP122 - Spartan-XL FPGA的Express配置

Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express mode signals and their associated timing are defined.The steps of Express configuration are described in detail, followed by detailed instructions thatshow how to implement the configuration circui

標簽： Spartan-XL Express XAPP FPGA

上傳時間： 2014-12-28

上傳用戶：hewenzhi
XAPP098 - Spartan FPGA低成本、高效率串行配置

This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.

標簽： Spartan XAPP FPGA 098

上傳時間： 2014-08-16

上傳用戶：adada
XAPP1042-利用GPIO實現以太網PHY寄存器訪問

The XPS Ethernetlite peripheral does not provide any mechanism to access the Ethernet PHYregisters. These registers are used to configure auto negotiation parameters and to obtain PHYstatus. This application note provides reference systems and associated software to accessPHY registers by connecting the serial management bus signals MDC and MDIO to GPIOswhich the software controls directly.

標簽： XAPP 1042 GPIO PHY

上傳時間： 2013-10-17

上傳用戶：JamesB