By Tom Christiansen and Nathan Torkington
ISBN 1-56592-243-3
First Edition, published August 1998.
(See the catalog page for this book.)
Search the text of Perl Cookbook.
Table of Contents
Copyright Page
Foreword
Preface
Chapter 1: Strings
Chapter 2: Numbers
Chapter 3: Dates and Times
Chapter 4: Arrays
Chapter 5: Hashes
Chapter 6: Pattern Matching
Chapter 7: File Access
Chapter 8: File Contents
Chapter 9: Directories
Chapter 10: Subroutines
Chapter 11: References and Records
Chapter 12: Packages, Libraries, and Modules
Chapter 13: Classes, Objects, and Ties
Chapter 14: Database Access
Chapter 15: User Interfaces
Chapter 16: Process Management and Communication
Chapter 17: Sockets
Chapter 18: Internet Services
Chapter 19: CGI Programming
Chapter 20: Web Automation
Index
Colophon
VTS(VisuaI Test Shelf) V3.4.7的源代碼。VTS是美國國家聯邦實驗室N.I.S.T.所開發的BACnet協議下的報文的測試工具。BACnet（A Data Communication Protocol for
Building Automation and Control Network）是由美國采暖、制冷和空調工程師協會制定的開放樓宇自動控制網絡數據通信協議。
Windows API Tutorials, Windows API編程最好的手冊.文檔格式專門制作成為各個章節相互關聯的html格式,大家可以像查閱msdn一樣方便使用.各個章節的內容如下:
Winnie
Generic
Controls
Dialog-based App
Generic Dialog
Canvas
Pens and Brushes
Threads
Folder Watcher
Shell API
OLE
Smart OLE
OLE Automation
Splitter Bar
Often it is necessary to add some logical control to a MATLAB algorithm to allow the generated hardware to function correctly in the overall system. This lab exercise will explore how hardware control can be added to a MATLAB algorithm and synthesized using AccelDSP Synthesis.
Demonstrates 1-D FDTD initial state formation. Please edit the FLAGS for demonstration of different cases. BASED ON "1-D Digital Waveguide Modeling for Improved Sound Synthesis".
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93 std
-- this design passes the Synplify synthesis check
The VHDL Golden Reference Guide is a compact quick reference guide to the VHDL language, its syntax, semantics, synthesis and application to hardware design.
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip
(SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent
method for simulation and synthesis. The library is vendor independent, with support for different
CAD tools and target technologies. A unique plug&play method is used to configure and connect
the IP cores without the need to modify any global resources.
Make and answer phone calls
Detect tone and pulse digit from the phone line
Capture Caller ID
Support blind transfer, single-step transfer/conference, consultation transfer/conference, hold, unhold.
Control of the local phone handset, microphone and speaker of the modem
Send and receive faxes
Play and record on the phone line or sound card
Play music in background mode
Silence detection
VU Meter
Wave sound editor that allows your end-users to edit their own sound files.
Voice recognition and voice synthesis.
Full control over the serial port device
ZModem file transfer utility
File compression and encryption utility
