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  • CPU的code banking技術實例: This Zip file contains five (3) folders: FastChip Project Files * This

    CPU的code banking技術實例: This Zip file contains five (3) folders: FastChip Project Files * This folder contains a folder called "bank" that should be moved into: <install_root>\FastChip\Projects Keil Project Files * These files are to be put into the directory of your choice and the project is to be opened from within Keil Hex Files * These files are the output of Keil. If you do not want to compile and link all of the code, these files can be loaded into FastChip directly

    標簽: This FastChip contains banking

    上傳時間: 2016-10-01

    上傳用戶:a3318966

  • 51大于64K源代碼怎么辦

    51大于64K源代碼怎么辦,分bank就可以了,本人一直用

    標簽: 64K 源代碼

    上傳時間: 2014-01-13

    上傳用戶:1109003457

  • Managing Humans is a selection of the best essays from Michael Lopps web site, Rands In Repose. Draw

    Managing Humans is a selection of the best essays from Michael Lopps web site, Rands In Repose. Drawing on Lopp s management experiences at Apple, Netscape, Symantec, and Borland, this book is full of stories based on companies in the Silicon Valley where people have been known to yell at each other. It is a place full of dysfunctional bright people who are in an incredible hurry to find the next big thing so they can strike it rich and then do it all over again. Among these people are managers, a strange breed of people who through a mystical organizational ritual have been given power over your future and your bank account. Whether you re an aspiring manager, a current manager, or just wondering what the heck a manager does all day, there is a story in this book that will speak to you. You will learn: * What to do when people start yelling at each other * How to perform a diving save when the best engineer insists on resigning * How to say "No" to the person who signs your paycheck

    標簽: selection Managing Michael Humans

    上傳時間: 2014-11-28

    上傳用戶:1427796291

  • Abstract - A fl exible multiscale and directional representation for images is proposed. The s

    Abstract - A fl exible multiscale and directional representation for images is proposed. The scheme combines directional fi lter banks with the Laplacian pyramid to provides a sparse representation for two- dimensional piecewise smooth signals resembling images. The underlying expansion is a frame and can be designed to be a tight frame. Pyramidal directional fi lter banks provide an effective method to implement the digital curvelet transform. The regularity issue of the iterated fi lters in the directional fi lter bank is examined.

    標簽: representation directional multiscale Abstract

    上傳時間: 2013-12-15

    上傳用戶:zxc23456789

  • Hybrid+Analog-Digital+Precoding

    In this paper we revisit hybrid analog-digital precoding systems with emphasis on their modelling and radio-frequency (RF) losses, to realistically evaluate their benefits in 5G system implementations. For this, we decompose the analog beamforming networks (ABFN) as a bank of commonly used RF components and formulate realistic model constraints based on their S-parameters. Specifically, we concentrate on fully-connected ABFN (FC-ABFN) and Butler networks for implementing the discrete Fourier transform (DFT) in the RF domain. The results presented in this paper reveal that the performance and energy efficiency of hybrid precoding systems are severely affected, once practical factors are considered in the overall design. In this context, we also show that Butler RF networks are capable of providing better performances than FC-ABFN for systems with a large number of RF chains.

    標簽: Analog-Digital Precoding Hybrid

    上傳時間: 2020-05-27

    上傳用戶:shancjb

  • Plug In Electric Vehicles in Smart Grids

    Plug in Electric Vehicles (PEVs) use energy storages usually in the form of battery banks that are designed to be recharged using utility grid power. One category of PEVs are Electric Vehicles (EVs) without an internal-combustion (IC) engine where the energy stored in the battery bank is the only source of power to drive the vehicle. These are also referred as Battery Electric Vehicles (BEVs). The second category of PEVs, which is more commercialized than the EVs, is the Plug in

    標簽: Electric Vehicles Grids Smart Plug In in

    上傳時間: 2020-06-07

    上傳用戶:shancjb

  • Plug In Electric Vehicles

    Plug in Electric Vehicles (PEVs) use energy storages usually in the form of battery banks that are designed to be recharged using utility grid power. One category of PEVs are Electric Vehicles (EVs) without an Internal-Combustion (IC) engine where the energy stored in the battery bank is the only source of power to drive the vehicle. These are also referred as Battery Electric Vehicles (BEVs). The second category of PEVs, which is more commercialized than the EVs, is Plug in Hybrid Electric Vehicles (PHEVs) where the role of the energy storage is to supplement the power produced by the IC engine. 

    標簽: Electric Vehicles Plug In

    上傳時間: 2020-06-07

    上傳用戶:shancjb

  • Electric Vehicles in Smart Grids

    Plug in Electric Vehicles (PEVs) use energy storages usually in the form of battery banks that are designed to be recharged using utility grid power. One category of PEVs are Electric Vehicles (EVs) without an Internal-Combustion (IC) engine where the energy stored in the battery bank is the only source of power to drive the vehicle. These are also referred to as Battery Electric Vehicles (BEVs). The second category of PEVs, which is more commercialized than the EVs, is the Plug in Hybrid Electric Vehicles (PHEVs) where the role of energy storage is to supplement the power produced by the IC engine. 

    標簽: Electric Vehicles Smart Grids in

    上傳時間: 2020-06-07

    上傳用戶:shancjb

  • Digital+Signal+Processing+for+RFID

    Identification is pervasive nowadays in daily life due to many complicated activities such as bank and library card reading, asset tracking, toll collecting, restricted access to sensitive data and procedures and target identification. This kind of task can be realized by passwords, bio- metric data such as fingerprints, barcode, optical character recognition, smart cards and radar. Radiofrequencyidentification(RFID)isatechniquetoidentifyobjectsbyusingradiosystems. It is a contactless, usually short distance, wireless data transmission and reception technique for identification of objects. An RFID system consists of two components: the tag (also called transponder) and the reader (also called interrogator).

    標簽: Processing Digital Signal RFID for

    上傳時間: 2020-06-08

    上傳用戶:shancjb

  • FPGA讀寫SD卡讀取BMP圖片通過LCD顯示例程實驗 Verilog邏輯源碼Quartus工程文件

    FPGA讀寫SD卡讀取BMP圖片通過LCD顯示例程實驗 Verilog邏輯源碼Quartus工程文件+文檔說明,FPGA型號Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。1 實驗簡介在前面的實驗中我們練習了 SD 卡讀寫,VGA 視頻顯示等例程,本實驗將 SD 卡里的 BMP 圖片讀出,寫入到外部存儲器,再通過 VGA、LCD 等顯示。本實驗如果通過液晶屏顯示,需要有液晶屏模塊。2 實驗原理在前面的實驗中我們在 VGA、LCD 上顯示的是彩條,是 FPGA 內部產生的數據,本實驗將彩條替換為 SD 內的 BMP 圖片數據,但是 SD 卡讀取速度遠遠不能滿足顯示速度的要求,只能先寫入外部高速 RAM,再讀出后給視頻時序模塊顯示module top( input                       clk, input                       rst_n, input                       key1, output [5:0]                seg_sel, output [7:0]                seg_data, output                      vga_out_hs,        //vga horizontal synchronization output                      vga_out_vs,        //vga vertical synchronization output[4:0]                 vga_out_r,         //vga red output[5:0]                 vga_out_g,         //vga green output[4:0]                 vga_out_b,         //vga blue output                      sd_ncs,            //SD card chip select (SPI mode) output                      sd_dclk,           //SD card clock output                      sd_mosi,           //SD card controller data output input                       sd_miso,           //SD card controller data input output                      sdram_clk,         //sdram clock output                      sdram_cke,         //sdram clock enable output                      sdram_cs_n,        //sdram chip select output                      sdram_we_n,        //sdram write enable output                      sdram_cas_n,       //sdram column address strobe output                      sdram_ras_n,       //sdram row address strobe output[1:0]                 sdram_dqm,         //sdram data enable output[1:0]                 sdram_ba,          //sdram bank address output[12:0]                sdram_addr,        //sdram address inout[15:0]                 sdram_dq           //sdram data);parameter MEM_DATA_BITS         = 16  ;            //external memory user interface data widthparameter ADDR_BITS             = 24  

    標簽: fpga

    上傳時間: 2021-10-27

    上傳用戶:

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