/*--------- 8051內核特殊功能寄存器 -------------*/ sfr ACC = 0xE0; //累加器 sfr B = 0xF0; //B 寄存器 sfr PSW = 0xD0; //程序狀態字寄存器 sbit CY = PSW^7; //進位標志位 sbit AC = PSW^6; //輔助進位標志位 sbit F0 = PSW^5; //用戶標志位0 sbit RS1 = PSW^4; //工作寄存器組選擇控制位 sbit RS0 = PSW^3; //工作寄存器組選擇控制位 sbit OV = PSW^2; //溢出標志位 sbit F1 = PSW^1; //用戶標志位1 sbit P = PSW^0; //奇偶標志位 sfr SP = 0x81; //堆棧指針寄存器 sfr DPL = 0x82; //數據指針0低字節 sfr DPH = 0x83; //數據指針0高字節 /*------------ 系統管理特殊功能寄存器 -------------*/ sfr PCON = 0x87; //電源控制寄存器 sfr AUXR = 0x8E; //輔助寄存器 sfr AUXR1 = 0xA2; //輔助寄存器1 sfr WAKE_CLKO = 0x8F; //時鐘輸出和喚醒控制寄存器 sfr CLK_DIV = 0x97; //時鐘分頻控制寄存器 sfr BUS_SPEED = 0xA1; //總線速度控制寄存器 /*----------- 中斷控制特殊功能寄存器 --------------*/ sfr IE = 0xA8; //中斷允許寄存器 sbit EA = IE^7; //總中斷允許位 sbit ELVD = IE^6; //低電壓檢測中斷控制位 8051
上傳時間: 2013-10-30
上傳用戶:yxgi5
采用單片機AT89C2051實現溫度測量與控制,鍵盤和顯示電路實現溫度的設定、修改、清零以及當前溫度值的顯示,并對溫度超過上下限進行報警。闡述了該系統設計的硬件和軟件設計。 Abstract: The system of temperature measuring and controling is realized based on AT89C2051.The keyboard and display circuit is designed,which can be used for setting and modifying temperature value,resetting and displaying the present temperature value.At the same time the warning circuit is also designed in the system,which can deal with the alarm when temperature exceeds the upper limit and the lower limit.The hardware and software design of the system are explained.
上傳時間: 2013-11-18
上傳用戶:leehom61
This application note describes how to decode standard DTMF tones using the minimum number of external discrete components and a PIC. The two examples use a PIC which has an 8 bit timer and either a comparator or an ADC, although it can be modified for use on a PIC which has only digital I/O. The Appendices have example code for the 16C662 (with comparator) and 16F877 (using the ADC). As the majority of the Digital Signal Processing is done in software, little is required in the way of external signal conditioning. Software techniques are used to model the individual elements of a DTMF Decoder IC.
上傳時間: 2013-11-21
上傳用戶:zhaoke2005
The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.
標簽: 4channel multiple 9544A 9544
上傳時間: 2014-12-28
上傳用戶:潛水的三貢
Abstract: This application note explains the hardware of different types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.
標簽: iButtons Reading Writing and
上傳時間: 2013-10-29
上傳用戶:long14578
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上傳時間: 2013-10-15
上傳用戶:euroford
摘要: 串行傳輸技術具有更高的傳輸速率和更低的設計成本, 已成為業界首選, 被廣泛應用于高速通信領域。提出了一種新的高速串行傳輸接口的設計方案, 改進了Aurora 協議數據幀格式定義的弊端, 并采用高速串行收發器Rocket I/O, 實現數據率為2.5 Gbps的高速串行傳輸。關鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協議 為促使FPGA 芯片與串行傳輸技術更好地結合以滿足市場需求, Xilinx 公司適時推出了內嵌高速串行收發器RocketI/O 的Virtex II Pro 系列FPGA 和可升級的小型鏈路層協議———Aurora 協議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時鐘生成及恢復等功能, 可以理想地適用于芯片之間或背板的高速串行數據傳輸。Aurora 協議是為專有上層協議或行業標準的上層協議提供透明接口的第一款串行互連協議, 可用于高速線性通路之間的點到點串行數據傳輸, 同時其可擴展的帶寬, 為系統設計人員提供了所需要的靈活性[4]。但該協議幀格式的定義存在弊端,會導致系統資源的浪費。本文提出的設計方案可以改進Aurora 協議的固有缺陷,提高系統性能, 實現數據率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應用前景。
上傳時間: 2013-11-06
上傳用戶:smallfish
The CC1101 is a low-cost sub- 1 GHztransceiver designed for very low-powerwireless applications. The circuit is mainlyintended for the ISM (Industrial, Scientific andMedical) and SRD (Short Range Device)frequency bands at 315, 433, 868, and 915MHz, but can easily be programmed foroperation at other frequencies in the 300-348MHz, 387-464 MHz and 779-928 MHz bands.CC1101 is an improved and code compatibleversion of the CC1100 RF transceiver. Themain improvements on the CC1101 include:
上傳時間: 2013-11-12
上傳用戶:363186
通過比較各種隔離數字通信的特點和應用范圍,指出塑料光纖在隔離數字通信中的優勢。使用已經標準化的TOSLINK接口,有利于節省硬件開發成本和簡化設計難度。給出了塑料光纖的硬件驅動電路,說明設計過程中的注意事項,對光收發模塊的電壓特性和頻率特性進行全面試驗,并給出SPI口使用塑料光纖隔離通信的典型應用電路圖。試驗結果表明,該設計可為電力現場、電力電子及儀器儀表的設計提供參考。 Abstract: y comparing characteristics and applications area of various isolated digital communications, this article indicates advantages of plastic optical fiber in isolated digital communications. Using the standardized TOSLINK interface, it helps to control costs and difficulty in hardware development and design. Then it gives the hardware driver circuit of plastic optical fiber module, explains the noticed details in design process, gives results on the basis of the optical transceiver module voltage characteristics and frequency characteristics tests. Finally,it gives typical application circuit of the SPI communication port by using plastic optical fiber isolation .The results show that this design can be referenced for the power field, power electronics and instrumentation design.
上傳時間: 2014-01-10
上傳用戶:gundan
The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained herein; norfor incidental or consequential damages resulting from the furnishing, performance, or use of this material.All parts of the CompactFlash Specification are protected by copyright law and all rights are reserved. Thisdocumentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to anyelectronic medium or machine readable form without prior consent, in writing, from the CompactFlash Association.The CFA logo is a trademark of the CompactFlash Association.Product names mentioned herein are for identification purposes only and may be trademarks and/or registeredtrademarks of their respective companies.© 1998-99, CompactFlash Association. All rights reserved.
標簽: 技術資料
上傳時間: 2013-10-08
上傳用戶:stewart·