6小時學會labview, labview Six Hour Course – Instructor Notes This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI. The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.
標簽： labview
上傳時間： 2013-10-13
上傳用戶：zjwangyichao
Abstract: This application note discusses a design for a phantom antenna power-supply system compatible with theDigital Satellite Equipment Control (DiSEqC) communication standard, using the MAX16948 automotive dual, highvoltageLDO/switch. The presented application circuit provides a remote antenna power supply and also enables onewaycommunication from the radio head unit to the remote antenna. This system architecture offers flexibility inDiSEqC tone-burst frequency choice (100Hz to 30kHz), enabling users the ability to select the best frequency for theirapplication.
上傳時間： 2013-11-17
上傳用戶：fnhhs
Abstract: With industrial/scientific/medical (ISM) band radio frequency (RF) products, often times users are new to the structure of Maxim's low pin-count transmitters andfully integrated superheterodyne receivers. This tutorial provides simple steps that can be taken to get the best performance out of these transmitters and receivers whileproviding techniques to measure the overall capability of the design.
上傳時間： 2013-11-02
上傳用戶：yph853211
本文簡單討論并總結了VHDL、Verilog，System verilog 這三中語言的各自特點和區別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
標簽： Verilog verilog System VHDL
上傳時間： 2014-03-03
上傳用戶：zhtzht
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
標簽： GUIDELINES LAYOUT 320 PCB
上傳時間： 2013-10-10
上傳用戶：manga135
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
維吉尼亞（Vigenere）密碼為了提高密碼的破譯的難度，人們有發明一種多表置換的密碼，即一個明文字母可以表示為多個密文字母，多表密碼加密算法結果將使得對單表置換用的簡單頻率分析方法失效，其中維吉尼亞密碼就是一種典型的加密方法。維吉尼亞密碼是使用一個詞組（語句）作為密鑰，詞組中每一個字母都作為移位替換密碼密鑰確定一個替換表，維吉尼亞密碼循環的使用每一個替換表完成明文字母到密文字母的變換，最后所得到的密文字母序列即為加密得到的密文，具體過程如下： 設密鑰 ，明文 ， 加密變換 其中 例如，M＝data security，k＝best。可以先將M分解為長為4的序列data secu rity 每一節利用密鑰k＝best加密得密文c=Ek(M)=EELT TIUN SMLR。 當密鑰k取的詞組很長時，截獲者就很難將密文破解。（我們還在計算機上就維吉尼亞密碼設計的方法，編寫了一個小的程序，可以運用其進行加密和相應的解密。見附錄） 由于我們知識和條件所限，本學期對以上6種古典加密方法進行了學習和研究，從中我們收獲頗多，我們了解古典密碼學的基本原理和方法，并能夠對信息進行簡單的加密和解密，大大提高我們的學習文化知識的興趣和熱情，如果有條件我們在今后將進一步研究密碼學。
上傳時間： 2015-03-24
上傳用戶：songnanhua
CC386 is a general-purpose 32-bit C compiler. It is not an optimizing compiler but given that the code generation is fairly good. There are two versions one is for MSDOS/DPMI and one is for Win32. The Win32 version has a full-blown IDE capable of editing, building, and debugging windows programs included with it. However at this time debugging support for MSDOS is rudimentary at best and there is no IDE for DOS. the newest version, support windows.
標簽： compiler general-purpose optimizing given
上傳時間： 2015-04-12
上傳用戶：gtzj
CBC下寫的串口編程，API函數實例 I wish this site had been around when I was trying to figure out how to make serial communications work in Windows95. I, like many programmers, was hit with the double-whammy of having to learn Windows programming and Win95 serial comm programming at the same time. I found both tasks confusing at best. It was particularly frustrating because I had, over the years, written so much stuff (including lots of serial comm software) for the DOS environment and numerous embedded applications. Interrupt driven serial comm, DMA transfer serial comm, TSR serial comm, C, assembler, various processors... you name it, it had written it. Yet, everything I knew seemed upside-down in the message-driven-callback world of Windows.
上傳時間： 2014-06-20
上傳用戶：cccole0605
裝箱問題：在裝箱問題中，有若干個容量為c 的箱子和n 個待裝載入箱子中的物品。物品i 需占 用s[i]個單元（0< s[i]≤c）。成功裝載是指能把所有物品都裝入箱子。最優裝載是指使用最 少箱子的成功裝載。 例如某運輸公司要把包裹裝入卡車中，每個包裹都有一定的重量，且每輛卡車也有其載 重限制（假設每輛卡車的載重都一樣）。在卡車裝載問題中，希望用最少的卡車來裝載包裹。 此問題可看作裝箱問題。卡車對應于箱子，包裹對應于物品。 解裝箱問題的Best Fit 算法： 設avail[i]為箱子i 的可用容量。 初始時，所有箱子的可用容量為c 。 選擇物品i放入具有最小avail且容量大于s[i]的箱子中。
標簽：
上傳時間： 2015-05-22
上傳用戶：yan2267246
