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board-specific

  • PCB設(shè)計(jì)軟件ExpressPCB 下載

    ExpressPCB 是一款免費(fèi)的PCB設(shè)計(jì)軟件,簡單實(shí)使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).

    標(biāo)簽: ExpressPCB PCB 設(shè)計(jì)軟件

    上傳時(shí)間: 2013-11-15

    上傳用戶:lchjng

  • Proteus教程中涉及的基本概念

      基本的編輯工具(GENERAL EDITING FACILITIES)   對(duì)象放置(Object Placement)   ISIS支持多種類型的對(duì)象,每一類型對(duì)象的具體作用和功能將在下一章給出。雖然類型不同,但放置對(duì)象的基本步驟都是一樣的。   放置對(duì)象的步驟如下(To place an object:)   1.根據(jù)對(duì)象的類別在工具箱選擇相應(yīng)模式的圖標(biāo)(mode icon)。   2. Select the sub-mode icon for the specific type of object.   2、根據(jù)對(duì)象的具體類型選擇子模式圖標(biāo)(sub-mode icon)。   3、如果對(duì)象類型是元件、端點(diǎn)、管腳、圖形、符號(hào)或標(biāo)記,從選擇器里(selector)選擇你想要的對(duì)象的名字。對(duì)于元件、端點(diǎn)、管腳和符號(hào),可能首先需要從庫中調(diào)出。   4、如果對(duì)象是有方向的,將會(huì)在預(yù)覽窗口顯示出來,你可以通過點(diǎn)擊旋轉(zhuǎn)和鏡象圖標(biāo)來調(diào)整對(duì)象的朝向。   5、最后,指向編輯窗口并點(diǎn)擊鼠標(biāo)左鍵放置對(duì)象。對(duì)于不同的對(duì)象,確切的步驟可能略有不同,但你會(huì)發(fā)現(xiàn)和其它的圖形編輯軟件是類似的,而且很直觀。   選中對(duì)象(Tagging an Object)   用鼠標(biāo)指向?qū)ο蟛Ⅻc(diǎn)擊右鍵可以選中該對(duì)象。該操作選中對(duì)象并使其高亮顯示,然后可以進(jìn)行編輯。

    標(biāo)簽: Proteus 教程 基本概念

    上傳時(shí)間: 2013-10-29

    上傳用戶:avensy

  • superpro 3000u 驅(qū)動(dòng)及編程器軟件下載

    superpro 3000u 驅(qū)動(dòng) PIC16C65B@QFP44 [SA245] PIC16C65B:          Part number QFP44:              Package in QFP44 SA245:              Adapter purchase number AM29DL320GT@FBGA48 [SA642+B026] AM29DL320GT:        Part number FBGA48:             Package in FBGA48 SA642:              Adapter purchase number (Top board with socket) B026:               Adapter purchase number (Bottom board, exchangable for different parts) 87C196CA@PLCC68(universal adapter) [PEP+S414T] 87C196CA:           Part number PLCC68:             Package in PLCC68 universal adapter:  this adapter is valid for all parts in this package PEP:                The PEP (Pin-driver Expansion Pack necessary to work with the adapter S414T) S414T:              Adapter purchase number (Universal for all parts in this package) S71PL127J80B@FBGA64(special adapter) [(SA642A-B079A-Y096AF001)] S71PL127J80B:            Part number FBGA64:                  Package in FBGA64 special adapter:         this adapter is valid for this

    標(biāo)簽: superpro 3000u 驅(qū)動(dòng) 編程器軟件

    上傳時(shí)間: 2013-10-23

    上傳用戶:Avoid98

  • PCB設(shè)計(jì)軟件ExpressPCB 下載

    ExpressPCB 是一款免費(fèi)的PCB設(shè)計(jì)軟件,簡單實(shí)使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).

    標(biāo)簽: ExpressPCB PCB 設(shè)計(jì)軟件

    上傳時(shí)間: 2013-10-09

    上傳用戶:1047385479

  • PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs

    Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.

    標(biāo)簽: Considerations Guidelines and Design

    上傳時(shí)間: 2013-11-09

    上傳用戶:ls530720646

  • 采用TüV認(rèn)證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標(biāo)簽: FPGA 安全系統(tǒng)

    上傳時(shí)間: 2013-11-14

    上傳用戶:zoudejile

  • 使用Nios II軟件構(gòu)建工具

     使用Nios II軟件構(gòu)建工具 This chapter describes the Nios® II Software Build Tools (SBT), a set of utilities and scripts that creates and builds embedded C/C++ application projects, user library projects, and board support packages (BSPs). The Nios II SBT supports a repeatable, scriptable, and archivable process for creating your software product. You can invoke the Nios II SBT through either of the following user interfaces: ■ The Eclipse™ GUI ■ The Nios II Command Shell The purpose of this chapter is to make you familiar with the internal functionality of the Nios II SBT, independent of the user interface employed.

    標(biāo)簽: Nios 軟件

    上傳時(shí)間: 2013-10-12

    上傳用戶:china97wan

  • 《器件封裝用戶向?qū)А焚愳`思產(chǎn)品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標(biāo)簽: 封裝 器件 用戶 賽靈思

    上傳時(shí)間: 2013-11-21

    上傳用戶:不懂夜的黑

  • XAPP098 - Spartan FPGA低成本、高效率串行配置

    This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.

    標(biāo)簽: Spartan XAPP FPGA 098

    上傳時(shí)間: 2013-11-01

    上傳用戶:wojiaohs

  • XAPP144 -設(shè)計(jì)CPLD多電壓系統(tǒng)

    Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for handling the multi-voltage interfacing, but do require forethought to ensure correctoperation.

    標(biāo)簽: XAPP CPLD 144 電壓

    上傳時(shí)間: 2013-11-10

    上傳用戶:yy_cn

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