The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.
This a simple example project for the MSP430 series MCU and the GCC port
of the mspgcc project. The project contains a makefile and uses assembler
and C sources. It shows a clock on an character LCD.
This sample displays a basic integer calculator powered
by the 8051 microcontroller. Although Keil C51 has a
full floating point math library the evaluation version
is restricted to 2k of object code, so we have constrained
this sample to integer maths in order to fit within this limit.
The program for this design was written in C using the
Keil uVision 2 IDE for which Proteus VSM provides
a Debug Monitor driver.
Instructions for configuring Proteus to run in conjunction
with the Keil environment can be found by editing the
8051 microcontroller on the schematic (point at it and
press CTRL-E) and then clicking on the help button
on the Edit Component dialogue form.
光伏發電是未來新能源發電重要方向之一，而光伏變流器是光伏發電系統的核心。介紹一種基于微網理念的光伏變流器設計。以該變流器為核心的光伏發電系統可以看做一個小型的微網系統。該系統能根據外部電網情況，工作于并網模式和離網模式。介紹了該系統的各個組成部件的設計以及變流器主電路部分器件的選型。最后，由實驗樣機進行測試。試驗結果驗證了電路拓撲結構及控制方案的可行性，也說明了系統參數設計方法的正確性。
Abstract:
Solar Photovoltaic generation is an important direction of new energy power generation in the future，while photovoltaic converter is the core of photovoltaic generation system. This paper deals with a study on photovoltaic inverter based on the concept of microgrid. This paper describes a system whose core component is the photovoltaic inverter，can work on grid-connected mode or run independently according to the external situation. The paper simply describes the main components of the system. At last，the prototype was produced and tested. Test result has proved feasibility of circuit topology structure and controlling scheme and shown correctness of system parameters.Key words: PV inverter； microgrid； off-grid； storage battery
