一個用MATLAB寫的實現通信中眼圖功能的S函數，.m格式，與 simulink中的eye diagram一樣
上傳時間： 2015-10-02
上傳用戶：tianjinfan
t transistor has the characteristics of components of the sensor real-time measurement of voltage and current signals through, obtained quality factor correction circuit for the feedback and the feedback time, IBM used the feedback field effect transistor implementation, in order to achieve quality factor correction circ
標簽： characteristics measurement transistor components
上傳時間： 2014-12-22
上傳用戶：杜瑩12345
A system simulation environment in Matlab/Simulink of RFID is constructed in this paper. Special attention is emphasized on the analog/RF circuit.Negative effects are concerned in the system model,such as phase noise of the local oscillator,TX-RX coupling,reflection of the environment, AWGN noise,DC offset,I/Q mismatch,etc.Performance of the whole system can be evaluated by changing the coding method,parameters of building blocks,and operation distance.Finally,some simulation results are presented in this paper.
標簽： environment constructed simulation Simulink
上傳時間： 2014-01-09
上傳用戶：zhangliming420
This paper investigates the design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via satellite (DVB-RCS). The proposed joint estimation algorithm is based on the interpolation technique for two correlation values in the frequency and phase domains. This simple interpolation technique can significantly improve frequency and phase resolution capabilities of the proposed technique without increasing the number of the correlation values. In addition, the overall block diagram of a digital communications receiver for DVB-RCS is presented, which was designed using the proposed estimation algorithms. Index Terms—Carrier phase estimation, DVB-RCS, frequency offset estimation, interpolation, joint estimation, MF-TDMA.
標簽： investigates estimation frequency carrier
上傳時間： 2015-12-30
上傳用戶：ls530720646
這個工具集提供以下結構化分析和UML分析中所用的圖形化繪圖工具：ER-diagrams, data and event flow diagrams and state-transition diagrams，class-diagram editor, a use-case diagram editor and an activity diagram editor
標簽： state-transition ER-diagrams and diagrams
上傳時間： 2014-12-09
上傳用戶：qunquan
The aim of this book is to provide the reader with a thorough grounding in the General Packet Radio Service – GPRS.The introduction contains a basic review of GSM to ensure that the reader is clear on the main aspects of circuit switched technology, as this will make the differences and advantages of packet oriented GPRS both more apparent and easier to understand.
標簽： grounding the thorough General
上傳時間： 2016-03-30
上傳用戶：康郎
Squaring circuits are an important building block for impulse-radio UWB non-coherent receivers. This work proposes a squarer, based on the quadratic law of saturated transistors. Such a circuit has already been proposed for lower frequency applications, therefore this work focuses on the extension to ultra wide bandwidth, with particular care to the consequences related to the deviation from the ideal quadratic law of 0.18μm CMOS transistors.
標簽： impulse-radio non-coherent important receivers
上傳時間： 2013-12-24
上傳用戶：kikye
This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequency detector (PFD) and digital-to-analog converter (DAC) circuit element to obtain >28dB high frequency noise reduction when compared to classicalfrequency synthesis.
標簽： fractional-N transmitter bandwidth circuits
上傳時間： 2016-04-14
上傳用戶：er1219
一種硬件描述語言（HDL），英文全稱為Very High Speed Integrated Circuit Hardware Description Language ，超高速集成電路硬件描述語言。
上傳時間： 2016-05-12
上傳用戶：waizhang
This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was realized in a 0.5 µ m CMOS process and it shows a power advantage of a factor 4 compared to a recent synchronous implementation in the same technology. The chip is fully bit compatible with the synchronous implementation, and timing compatible for external memory access. The circuit is a compiled VLSI-program, using Tangram as VLSI-programming language and the Tangram tool set to compile the design automatically to a standard-cell netlist. This design approach proves to be powerful enough to describe the microcontroller and derive an efficient implementation. Further, it offers the designer the possibility to explore various alternatives in the design space.
標簽： microcontroller implementation asynchronous low-power
上傳時間： 2016-06-07
上傳用戶：冇尾飛鉈
