This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上傳時間： 2014-01-24
上傳用戶：15527161163
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
上傳時間： 2013-11-01
上傳用戶：wojiaohs
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
上傳時間： 2013-11-23
上傳用戶：kangqiaoyibie
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
上傳時間： 2013-11-11
上傳用戶：zwei41
The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
上傳時間： 2013-10-09
上傳用戶：evil
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.
標簽： CPLD
上傳時間： 2014-12-05
上傳用戶：qazxsw
解壓密碼：www.elecfans.com 隨著微電子技術的迅速發(fā)展以及集成電路規(guī)模不斷提高，對電路性能的設計 要求越來越嚴格，這勢必對用于大規(guī)模集成電路設計的EDA 工具提出越來越高的 要求。自1972 年美國加利福尼亞大學柏克萊分校電機工程和計算機科學系開發(fā) 的用于集成電路性能分析的電路模擬程序SPICE（Simulation Program with IC Emphasis）誕生以來，為適應現(xiàn)代微電子工業(yè)的發(fā)展，各種用于集成電路設計的 電路模擬分析工具不斷涌現(xiàn)。HSPICE 是Meta-Software 公司為集成電路設計中 的穩(wěn)態(tài)分析，瞬態(tài)分析和頻域分析等電路性能的模擬分析而開發(fā)的一個商業(yè)化通 用電路模擬程序，它在柏克萊的SPICE（1972 年推出），MicroSim公司的PSPICE （1984 年推出）以及其它電路分析軟件的基礎上，又加入了一些新的功能，經(jīng) 過不斷的改進，目前已被許多公司、大學和研究開發(fā)機構廣泛應用。HSPICE 可 與許多主要的EDA 設計工具，諸如Candence,Workview 等兼容，能提供許多重要 的針對集成電路性能的電路仿真和設計結果。采用HSPICE 軟件可以在直流到高 于100MHz 的微波頻率范圍內(nèi)對電路作精確的仿真、分析和優(yōu)化。在實際應用中， HSPICE能提供關鍵性的電路模擬和設計方案，并且應用HSPICE進行電路模擬時， 其電路規(guī)模僅取決于用戶計算機的實際存儲器容量。 The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto standard HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.
上傳時間： 2013-10-18
上傳用戶：s363994250
介紹了基于Matlab/RTW（Real-time Workshop）和RTX（Real-time extension）構建實時仿真系統(tǒng)的方法；針對基于RTX的實時仿真系統(tǒng)不能直接進行在線調(diào)參的不足，提出了一種利用C API（C文件應用程序接口）實現(xiàn)在線調(diào)參的方法。經(jīng)過實驗證明，此仿真系統(tǒng)不僅具有很強的實時性，并且擁有良好的人機交互能力；另外，在線調(diào)參功能的實現(xiàn)使仿真試驗的效率得到了大大的提高，而且還可以作為一種故障注入方法來考察模型的容錯能力，是基于RTX實時仿真系統(tǒng)的一大改良。
標簽： API RTX 實時仿真系統(tǒng)
上傳時間： 2014-03-20
上傳用戶：lizhizheng88
The power of programmability gives industrial automation designers a highly efficient， cost-effective alternative to traditional motor control units （MCUs）。 The parallel-processing power， fast computational speeds， and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control （FOC）。 Additionally， Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing （DSP） that can tackle compute-intensive functions such as PID Controller， Clark/Park transforms， and Space Vector PWM. The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving， proven， motor-control reference designs. The kit also shortens the process of developing custom control capabilities， with integrated peripheral functions （Ethernet， PowerLink， and PCI® Express）， a motor-control FPGA mezzanine card （FMC） with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators， and prototyping support for evaluating alternative front-end circuitry.
上傳時間： 2013-10-28
上傳用戶：wujijunshi
Ebase實時數(shù)據(jù)庫系統(tǒng)（Ebase Real-time Database Management System，簡稱EBase實時數(shù)據(jù)庫）是上海谷益科技有限公司推出的具有自主知識產(chǎn)權的實時數(shù)據(jù)庫管理系統(tǒng)及套件產(chǎn)品。 實時數(shù)據(jù)庫系統(tǒng)理論在新領域的擴展，在電力、鋼鐵、化工、造紙領域有著廣闊的應用前景，可以為企業(yè)提供高速、實時數(shù)據(jù)服務，能夠對快速變化的數(shù)據(jù)進行長期保存，是工廠控制層與生產(chǎn)管理系統(tǒng)之間連接橋梁，同時也是先進控制，在線優(yōu)化、故障診斷的數(shù)據(jù)平臺
標簽： Ebase 實時數(shù)據(jù)庫
上傳時間： 2013-10-08
上傳用戶：muhongqing
