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Abstract: Investment in smart meters and smart grid end equipment continues to grow worldwide as countriestry to make their electric delivery systems more efficient. However, as critical as the electric deliveryinfrastructure is, it is normally not secured and thus subject to attack. This article describes the concept oflife-cycle security—the idea that embedded equipment in the smart grid must have security designed into theentire life of the product, even back to the contract manufacturer. We also talk about how life-cycle securityapplies to embedded equipment in the smart grid. Potential threats are discussed, as are potential solutionsto mitigate the risks posed by those threats.
標(biāo)簽：
智能電表
智能電網(wǎng)
上傳時(shí)間：
2014-12-24
上傳用戶：熊少鋒
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高的工作電壓高達(dá)100V N雙N溝道MOSFET同步驅(qū)動(dòng) The D810DCDC is a synchronous step-down switching regulator controller that can directly step-down voltages from up to 100V, making it ideal for telecom and automotive applications. The D810DCDC uses a constant on-time valley current control architecture to deliver very low duty cycles with accurate cycle-by-cycle current limit, without requiring a sense resistor. A precise internal reference provides 0.5% DC accuracy. A high bandwidth (25MHz) error amplifi er provides very fast line and load transient response. Large 1Ω gate drivers allow the D810DCDC to drive multiple MOSFETs for higher current applications. The operating frequency is selected by an external resistor and is compensated for variations in VIN and can also be synchronized to an external clock for switching-noise sensitive applications. Integrated bias control generates gate drive power from the input supply during start-up and when an output shortcircuit occurs, with the addition of a small external SOT23 MOSFET. When in regulation, power is derived from the output for higher effi ciency.
標(biāo)簽：
DCDC
100
12V
BOM
上傳時(shí)間：
2013-10-24
上傳用戶：wd450412225
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Although recent popular attention is focused on LithiumIon batteries, one must not forget that other batterychemistries, such as Nickel Cadmium (NiCd) and NickelMetal Hydride (NiMH) have advantages in rechargeablepower systems. Nickel-based batteries are robust, capableof high discharge rates, have good cycle life, do notrequire special protection circuitry and are less expensivethan Li-Ion. Among the two, NiMH batteries are rapidlyreplacing NiCd because of their higher capacity (40% to50% more) and the environmental concerns of the toxiccadmium contained in NiCd batteries.
標(biāo)簽：
NiMH
NiCd
獨(dú)立
電池充電
上傳時(shí)間：
2013-11-04
上傳用戶：qq10538412
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IC 特色 :
˙ 半諧振模式之 ZVS零電壓切換 , 能有效降低切換損失 , 提高效率 , 并具展頻功能 , 改善EMI .
˙ 輕 / 重載的 Duty Factor 皆在 CCM 與 DCM 邊緣 , 是最能發(fā)揮次級(jí) "同步整流" 效率的一種工作模式 .
˙ 空載時(shí)進(jìn)入 cycle Skipping ( Typical 0.3W ) , 有效達(dá)成環(huán)保規(guī)範(fàn) .
˙ 內(nèi)建 "LEB前緣遮沒(méi)" 功能 , 避免電流迴授失真 .
˙ 能隨輸入電壓變化 , 自動(dòng)補(bǔ)償 OPP過(guò)功率保護(hù)點(diǎn) .
˙ 精密的 OVP 過(guò)壓保護(hù)點(diǎn)可自行設(shè)定 .
˙ 完整的保護(hù)功能 : OVP過(guò)壓保護(hù) , OCP過(guò)流保護(hù) , OPP過(guò)載保護(hù) ,
SWP線圈短路保護(hù) , SCP輸出短路保護(hù) , OTP過(guò)溫度保護(hù) .
標(biāo)簽：
飛利浦
綠色電源
集成電路
選型
上傳時(shí)間：
2014-12-24
上傳用戶：回電話#
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實(shí)時(shí)時(shí)鐘是微機(jī)保護(hù)裝置的重要部件，在討論P(yáng)CF8583結(jié)構(gòu)與功能的基礎(chǔ)上，提出采用dsPIC33F系列微處理器與串行I2C時(shí)鐘PCF8583的接口設(shè)計(jì)方案，給出了相應(yīng)的接口電路與軟件流程。該設(shè)計(jì)方案結(jié)構(gòu)簡(jiǎn)單，可靠性高，開(kāi)發(fā)周期短，具有一定的實(shí)用與參考價(jià)值。所設(shè)計(jì)的微機(jī)保護(hù)裝置已投入現(xiàn)場(chǎng)運(yùn)行，效果良好。
Abstract:
Real-time clock chip is an important part in microcomputer protection device.Based on discussing the structure and function of PCF8583，a new interface scheme which uses dsPIC33F microprocessor and serial clock chip（I2C）PCF8583is proposed.The method of the circuit design and the main software flow are introduced in this paper.The scheme has simple structure，higher reliability and shorter exploitation cycle，so has definite practicality or reference value.The microcomputer protection device has been put into operation with better effects.
標(biāo)簽：
8583
PCF
串行時(shí)鐘
中的應(yīng)用
上傳時(shí)間：
2013-11-18
上傳用戶：Thuan
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數(shù)字信號(hào)處理器dsPIC33F集多通道高精度A/D轉(zhuǎn)換、多通訊模式、看門(mén)狗、CMOS Flash技術(shù)等于一體，其內(nèi)部可完成所有數(shù)據(jù)操作，實(shí)現(xiàn)總線不出芯片技術(shù)。將該處理器應(yīng)用于微機(jī)保護(hù)裝置，提出基于dsPIC33F微處理器的微機(jī)保護(hù)裝置的設(shè)計(jì)方案，給出相應(yīng)的接口電路與軟件流程。該設(shè)計(jì)方案結(jié)構(gòu)簡(jiǎn)單，性價(jià)比及可靠性高，開(kāi)發(fā)周期短，具有一定的實(shí)用推廣價(jià)值。所研制的微機(jī)保護(hù)裝置現(xiàn)場(chǎng)運(yùn)行效果良好。
Abstract:
The dsPIC33F microprocessor has a plentiful interior resource which contains multi-channel，high precision A/D converters，multi-communication module，watchdog，CMOS Flash technology，and so on.All data manipulations is accomplished interiorly.What is more，it makes the technology that bus does not go beyond the chip comes into practice.The paper put forwards a design scheme based on dsPIC33F microprocessor.The scheme has the advantages of simple structure，high reliability and shortened exploitation cycle.What is more，it has definite practicality and reference.The microcomputer protection device has been put into operation with excellent effects.
標(biāo)簽：
dsPIC
33F
33
微處理器
上傳時(shí)間：
2013-11-16
上傳用戶：開(kāi)懷常笑
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介紹了用單片機(jī)C 語(yǔ)言實(shí)現(xiàn)無(wú)功補(bǔ)償中電容組循環(huán)投切的基本原理和算法，并舉例說(shuō)明。關(guān)鍵詞：循環(huán)投切;C51;無(wú)功補(bǔ)償中圖分類(lèi)號(hào)： TM76 文獻(xiàn)標(biāo)識(shí)碼： BAbstract: This paper introduces the aplication of C51 in the controlling of capacitorsuits cycle powered to be on and off in reactive compensation.it illustrate thefondamental principle and algorithm with example.Key words: cycle powered to be on and off; C51; reactive compensation
為提高功率因數(shù)，往往采用補(bǔ)償電容的方法來(lái)實(shí)現(xiàn)。而電容器的容量是由實(shí)時(shí)功率因數(shù)與標(biāo)準(zhǔn)值進(jìn)行比較來(lái)決定的，實(shí)時(shí)功率因數(shù)小于標(biāo)準(zhǔn)值時(shí)，需投入電容組，實(shí)時(shí)功率因數(shù)大于標(biāo)準(zhǔn)值時(shí)，則需切除電容組。投切方式的不合理，會(huì)對(duì)電容器造成損壞，現(xiàn)有的控制器多采用“順序投切”方式，在這種投切方式下排序在前的電容器組，先投后切；而后面的卻后投先切。這不僅使處于前面的電容組經(jīng)常處于運(yùn)行狀態(tài)，積累熱量不易散失，影響其使用壽命，而且使后面的投切開(kāi)關(guān)經(jīng)常動(dòng)作，同樣減少壽命。合理的投切方式應(yīng)為“循環(huán)投切”。這種投切方式使先投入的運(yùn)行的電容組先退出，后投的后切除，從而使各組電容及投切開(kāi)關(guān)使用機(jī)率均等，降低了電容組的平均運(yùn)行溫度，減少了投切開(kāi)關(guān)的動(dòng)作次數(shù)，延長(zhǎng)了其使用壽命。
標(biāo)簽：
C51
無(wú)功補(bǔ)償
循環(huán)
電容
上傳時(shí)間：
2014-12-27
上傳用戶：hopy
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The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
標(biāo)簽：
EEPROM
64
CMOS
CAT
上傳時(shí)間：
2013-11-16
上傳用戶：浩子GG
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標(biāo)簽：
Signal
Input
Fall
Rise
上傳時(shí)間：
2013-10-23
上傳用戶：copu
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
標(biāo)簽：
C16x
微控制器
輸入信號(hào)
時(shí)序圖
上傳時(shí)間：
2014-04-02
上傳用戶：han_zh
