Artistic Style is a reindenter and reformatter of C, C++, C# and Java source code.
When indenting source code, we as programmers have a tendency to use both spaces and tab characters to create the wanted indentation. Moreover, some editors by default insert spaces instead of tabs when pressing the tab key, and other editors (Emacs for example) have the ability to "pretty up" lines by automatically setting up the white space before the code on the line, possibly inserting spaces in a code that up to now used only tabs for indentation.
Project file for MS Visual C++ 6.0.
Requires GLUT DLL (www.opengl.org)
Adjust program constants in Landscape.h and Utility.cpp.
MAPS:
default map is read from HeghtXXX.raw where XXX is the MAP_SIZE
(as defined in Landscape.h). If this map is not found, the program
attempts to open "Map.ved", a Tread Marks map file. Tread Marks maps
will only work for MAP_SIZE == 1024. Also, the MULT_SCALE to view
Tread Marks maps correctly is "0.25f". (www.TreadMarks.com)
Full compliance with the USB Specification v1.1 and USB CDC v1.1
Support the RS232 Serial interface
Support automatic handshake mode
Support Remote wake-up and power management
256 bytes buffer each for upstream and downstream data flow
Support default ROM or external EEPROM for device configuration
On chip USB transceiver
On chip crystal oscillator running at 12M Hz
Supports Windows 98/SE, ME, 2000, XP, Windows CE3.0, CE .NET, Linux, and Mac OS
28 Pins SOIC package
28
MSP-FET430P410 Demo - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK
Description Toggle P5.1 using using software and TA_0 ISR. Toggle rate is
set at 50000 DCO/SMCLK cycles. default DCO frequency used for TACLK.
Durring the TA_0 ISR P5.1 is toggled and 50000 clock cycles are added to CCR0. TA_0 ISR is triggered exactly 50000 cycles. CPU is normally off and
used only durring TA_ISR.
ACLK = n/a, MCLK = SMCLK = TACLK = DCO ~ 800k
D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger
Description A 32 byte block from 220h-240h is transfered to 240h-260h
using DMA0 in a burst block using software DMAREQ trigger.
After each transfer, source, destination and DMA size are
reset to inital software setting because DMA transfer mode 5 is used.
P1.0 is toggled durring DMA transfer only for demonstration purposes.
** RAM location 0x220 - 0x260 used - always make sure no compiler conflict **
ACLK= n/a, MCLK= SMCLK= default DCO ~ 800k
MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers
Description: Demonstrate USART0 in two-way SPI mode. Data are read from
an HC165, and same data written back to the HC164.
ACLK = n/a MCLK = SMCLK = default DCO = UCLK0 = DCO/2
* USART0 control bits are in different SFR s from other MSP430 s *
this directory
contains the following:
* The acdc algorithm for finding the
approximate general (non-orthogonal)
joint diagonalizer (in the direct Least Squares sense) of a set of Hermitian matrices.
[acdc.m]
* The acdc algorithm for finding the
same for a set of Symmetric matrices.
[acdc_sym.m](note that for real-valued matrices the Hermitian and Symmetric cases are similar however, in such cases the Hermitian version
[acdc.m], rather than the Symmetric version[acdc_sym] is preferable.
* A function that finds an initial guess
for acdc by applying hard-whitening
followed by Cardoso s orthogonal joint
diagonalizer. Note that acdc may also
be called without an initial guess,
in which case the initial guess is set by default to the identity matrix.
The m-file includes the joint_diag
function (by Cardoso) for performing
the orthogonal part.
[init4acdc.m]
