·詳細說明：正式出版物《Verilog HDL 硬件描述語言》一書的精美 PDF 電子版。- Official publication Verilog HDL Hardware description Language a book fine PDF electron version.目 錄譯者序前言第1章 簡介&n
上傳時間： 2013-07-02
上傳用戶：6404552
·【原書名】 The Verilog Hardware description Language(Fourth Edition) 【原出版社】 Kluwer Academic Publishers 【作者】 Donald E.Thomas &
上傳時間： 2013-04-24
上傳用戶：q123321
·SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling ver
標簽： nbsp SystemVerilog Design for
上傳時間： 2013-07-14
上傳用戶：ainimao
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC Hardwaredescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
上傳時間： 2014-12-23
上傳用戶：xinhaoshan2016
本文簡單討論并總結了VHDL、Verilog，System verilog 這三中語言的各自特點和區別As the number of enhancements to variousHardware description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
標簽： Verilog verilog System VHDL
上傳時間： 2013-10-16
上傳用戶：牛布牛
Abstract: Many industrial/scientific/medical (ISM) band radio frequency (RF) products use crystal oscillators to generate areference for the phase-locked loop (PLL)-based local oscillator (LO). This tutorial provides a basic description of theISM-RF Crystal Calculator, which can be used to calculate various impacts on crystal frequency accuracy and startupmargin for such an LO.
上傳時間： 2013-11-15
上傳用戶：JasonC
Abstract: This article discusses application circuits for Maxim force/sense digital-to-analog converters (DACs). Applications include:selectable fixed-gain DAC, programmable gain DAC, photodiode bias control, amperometric sensor control, digitally programmablecurrent source, Kelvin load sensing, temperature sensing, and high current DAC output. A brief description of the various DAC outputconfigurations is also given.
標簽： DAC
上傳時間： 2013-11-04
上傳用戶：youmo81
This application note provides a detailed description of themetastable behavior in PLDs from both circuit and statisticalviewpoints. Additionally, the information on the metastablecharacteristics of Cypress PLDs presented here can help youachieve any desired degree of reliability.
上傳時間： 2013-10-23
上傳用戶：gtzj
匯編器在微處理器的驗證和應用中舉足輕重，如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統設計思想，在匯編語言與機器語言間插入中間代碼CMDL（code mapping description language）語言，打破匯編語言與機器語言的直接映射關系，由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發了一套匯編器系統，具有較高層次上的通用性和可移植性。【關鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
The Motorola MPC106 PCI bridge/memory controller provides a PowerPCªmicroprocessor common hardware reference platform (CHRPª) compliant bridgebetween the PowerPC microprocessor family and the Peripheral Component Interconnect(PCI) bus. In this document, the term Ô106Õ is used as an abbreviation for the phraseÔMPC106 PCI bridge/memory controllerÕ. This document contains pertinent physicalcharacteristics of the 106. For functional characteristics refer to theMPC106 PCI Bridge/Memory Controller UserÕs Manual.This document contains the following topics:Topic PageSection 1.1, ÒOverviewÓ 2Section 1.2, ÒFeaturesÓ 3Section 1.3, ÒGeneral ParametersÓ 5Section 1.4, ÒElectrical and Thermal CharacteristicsÓ 5Section 1.5, ÒPin AssignmentsÓ 17Section 1.6, ÒPinout Listings 18Section 1.7, ÒPackage descriptionÓ 22Section 1.8, ÒSystem Design InformationÓ 24Section 1.9, ÒDocument Revision HistoryÓ 29Section 1.10, ÒOrdering InformationÓ 29
上傳時間： 2013-11-04
上傳用戶：as275944189
