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digital-to-analog

  • High-Speed Digital System Design

    Introduce High-Speed Digital System Design.

    標簽: High-Speed Digital Design System

    上傳時間: 2013-10-20

    上傳用戶:gps6888

  • 如何選擇正確的CMOS模擬開關

    Abstract: With the large number of analog switches on the market today, there are many performance criteria for a product designer to consider. This application note reviews the basic construction of

    標簽: CMOS 如何選擇 模擬開關

    上傳時間: 2013-11-09

    上傳用戶:xiaohanhaowei

  • 寄存器和環路濾波器的設計

    The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX2870 and ADF4350 registers andloop filter design in detail. Users who already familiar with ADF4350 canuse this application note as a quick design reference.

    標簽: 寄存器 環路濾波器

    上傳時間: 2014-12-23

    上傳用戶:變形金剛

  • 模擬技術要點入門學習指南

    Maxim Analog Essentials are a series of plug-in peripheral modules that allow engineers to quickly test, evaluate, and integrate Maxim components into their hardware/software designs. The modules electrically and physically conform to the Digilent Pmod™ interface specification and are compatible with any Digilent Pmod-compatible header.

    標簽: 模擬技術

    上傳時間: 2013-11-14

    上傳用戶:ljj722

  • MAX4968,MAX4968A數據手冊

    The MAX4968/MAX4968A are 16-channel, high-linearity,high-voltage, bidirectional SPST analog switches with18I (typ) on-resistance. The devices are ideal for use inapplications requiring high-voltage switching controlledby a low-voltage control signal, such as ultrasound imagingand printers. The MAX4968A provides integrated40kI (typ) bleed resistors on each switch terminal todischarge capacitive loads. Using HVCMOS technology,these switches combine high-voltage bilateral MOSswitches and low-power CMOS logic to provide efficientcontrol of high-voltage analog signals.

    標簽: 4968 MAX 數據手冊

    上傳時間: 2013-10-09

    上傳用戶:yepeng139

  • 消除電源旁路濾波噪聲

    Abstract: If sensitive analog systems are run from one supply without the sufficient bypassing to eliminate noise,

    標簽: 電源旁路 濾波噪聲

    上傳時間: 2013-11-23

    上傳用戶:qiulin1010

  • 利用數字電位器調整并校準升壓型DC-DC轉換器

    The purpose of this application note is to show an example of how a digital potentiometer can be used in thefeedback loop of a step-up DC-DC converter to provide calibration and/or adjustment of the output voltage.The example circuit uses a MAX5025 step-up DC-DC converter (capable of generating up to 36V,120mWmax) in conjunction with a DS1845, 256 position, NV digital potentiometer. For this example, the desiredoutput voltage is 32V, which is generated from an input supply of 5V. The output voltage can be adjusted in35mV increments (near 32V) and span a range wide enough to account for resistance, potentiometer and DCDCconverter tolerances (27.6V to 36.7V).

    標簽: DC-DC 數字電位器 升壓型 校準

    上傳時間: 2014-12-23

    上傳用戶:781354052

  • 精密DAC和看門狗提高模擬輸出安全

    Abstract: Using a DAC and a microprocessor supervisor, the system safety can be improved in industrial controllers, programmablelogiccontrollers (PLC), and data-acquisition systems. The analog output is set to zero-scale (or pin-programmable midscale) when amicroprocessor failure, optocoupler failure, or undervoltage condition occurs. A simple application is shown on how to implement thisfunction.

    標簽: DAC 精密 看門狗 模擬

    上傳時間: 2013-10-17

    上傳用戶:sjb555

  • 簡化精密測量的高輸入阻抗ADC

      High input impedance and a wide input range are twohighly desirable features in a precision analog-to-digitalconverter, and the LTC®2449 delta-sigma ADC has both.With just a few external components, the LTC2449 formsan exceptional measurement system with very high inputimpedance and an input range that extends 300mV beyondthe supply rails.

    標簽: ADC 精密測量 高輸入阻抗

    上傳時間: 2013-11-02

    上傳用戶:ywcftc277

  • RF至數字接收器的信號鏈噪聲分析

      Designers of signal receiver systems often need to performcascaded chain analysis of system performancefrom the antenna all the way to the ADC. Noise is a criticalparameter in the chain analysis because it limits theoverall sensitivity of the receiver. An application’s noiserequirement has a signifi cant infl uence on the systemtopology, since the choice of topology strives to optimizethe overall signal-to-noise ratio, dynamic range andseveral other parameters. One problem in noise calculationsis translating between the various units used by thecomponents in the chain: namely the RF, IF/baseband,and digital (ADC) sections of the circuit.

    標簽: 數字接收器 信號鏈 噪聲分析

    上傳時間: 2014-12-05

    上傳用戶:cylnpy

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