<strike id="2ui42"></strike>
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時間： 2013-10-22
上傳用戶：taiyang250072
一個24c16的讀寫程序（已經調試過）(arens) //////////////////////////////////////////////////////////////// //24c16讀寫驅動程序，FM24C16A-AT24C16中文資料pdf //=-------------------------------------------------------------------------------/*模塊調用:讀數據:read(unsigned int address)寫數據:write(unsigned int address,unsigned char dd) dd為要寫的 數據字節*///---------------------------------------------------------------------------------- sbit sda=P3^0;sbit scl=P3^1; sbit a0=ACC^0; //定義ACC的位，利用ACC操作速度最快sbit a1=ACC^1;sbit a2=ACC^2;sbit a3=ACC^3;sbit a4=ACC^4;sbit a5=ACC^5;sbit a6=ACC^6;sbit a7=ACC^7; //--------------------------------------------------------------------------------------#pragma disablevoid s24(void) //起始函數{_nop_(); scl=0; sda=1; scl=1; _nop_(); sda=0; _nop_(); _nop_(); scl=0; _nop_(); _nop_(); sda=1;
上傳時間： 2013-10-31
上傳用戶：fdfadfs
c8051f020 實時時鐘模塊程序 內含IIC模塊程序/********************** SYSTEM CLOCK 8M********************************/ extern unsigned char xdata currenttime[16]={0} extern unsigned char xdata settime[16]={ 0x00, // control regesiter 1 0x00, // control regesiter 2 0x01, //current second 0x19, //current minute 0x20, //current hour 0x29, //current data 0x04, //current week 0x07, //current month 0x05, //current year 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // clk out disable 0x00, // close timer 0x00, } /*********************************************************************/ extern void Current_Time ( void ) extern void Set_Time ( void )
標簽： c8051f020 SYSTEM CLOCK IIC
上傳時間： 2015-06-30
上傳用戶：edisonfather
IrCOMM2k - Virtual Infrared COM Port for Windows 2000/XP。 2. FILES IN THIS ARCHIVE: - Setup.exe (setup and uninstall program) - ircomm2k.exe (service program) - ircomm2k.sys (device driver) - ircomm2k.dll (device property page) - ircomm2k.hlp (property page context help) - ircomm2k.inf (setup script for windows) - Readme.txt (this file) - License.txt (terms of license) 3. INSTALLATION 1. unzip IrCOMM2k-1.2.0.zip in a new folder 2. run the setup program 3. disable the image transfer under wireless link
標簽： IrCOMM2k Infrared ARCHIVE Virtual
上傳時間： 2015-09-15
上傳用戶：yyq123456789
基于Verilog-HDL的硬件電路的實現 9.5 脈沖周期的測量與顯示 9.5.1 脈沖周期的測量原理 9.5.2 周期計的工作原理 9.5.3 周期測量模塊的設計與實現 9.5.4 forever循環語句的使用方法 9.5.5 disable禁止語句的使用方法 9.5.6 時標信號發生模塊的設計與實現 9.5.7 周期計的Verilog-HDL描述 9.5.8 周期計的硬件實現 9.5.9 周期測量模塊的設計與實現之二 9.5.10 改進型周期計的Verilog-HDL描述 9.5.11 改進型周期計的硬件實現 9.5.12 兩種周期計的對比
標簽： Verilog-HDL 周期 9.5 脈沖
上傳時間： 2015-09-16
上傳用戶：皇族傳媒
SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on Dhrystone 2.1. It shows the rate when I+D Caches are disabled or enabled, with or without MMU and I Cache is disable or enabled, with or without MMU.
標簽： BasicMMU Example project 9261
上傳時間： 2013-12-28
上傳用戶：zhanditian
IO 驅動 LCD , *** *** *** *** *** *** *** *** FILE NAME: IO_LCD MCU: HT46R22 MASK OPTION: WAKE-UP: PA6,PA7 PULL-HIGH: PA,PB,PC IIC: disable PFD: disable PWM: disable WDT: ENABLE CLRWDT: ONE WDT CLOCK SOURCE: T1 WDT TIME OUT SELECT: WDT CLOCK SOURCE/32768 LVR: disable OSC: CRYSTAL SYSVOLT: 3.0V SYSFRAG: 4000KHZ AUTHOR: RADOME HISTORY: 2005.08.
上傳時間： 2014-12-21
上傳用戶：watch100
該模塊基于USB FX2開發板，實現了GPIO(general-purpose IO)控制功能，目前可提供15口輸出控制在0V/3.3V之間切換，和9口輸入在Enable/disable之間切換。
上傳時間： 2014-12-06
上傳用戶：myworkpost
NRF905驅動代碼 // The content of this struct is nRF905 s initialize data. // CH_NO=1 433MHZ Normal Opration,No Retrans RX,TX Address is 4 Bytes // RX TX Payload Width is 32 Bytes disable Extern Clock Fosc=16MHZ // 8 Bits CRC And enable
標簽： initialize 905 content Normal
上傳時間： 2013-12-16
上傳用戶：lanjisu111
模仿spy++ 截獲取任意窗口句柄，然后對其執行相關操作（目前實現了enable和disable)
上傳時間： 2016-09-16
上傳用戶：cuiyashuo
<rt id="ia4ma"></rt>
<li id="ia4ma"></li>