This research work aims at eliminating the off-chip RF SAW filters from fre-
quency division duplexed (FDD) receivers. In the first approach, a monolithic passive
RF filter was constructed using on-chip capacitors and bondwire inductors. The bond-
wire characteristics were studied in details and the effect of mutual inductive coupling
between the bondwires on the filter performance was analyzed. Based on that, a bond-
wire configuration was proposed to improve the frequency response of the filter. The
filter was implemented in 0.18 μm CMOS process for WCDMA applications.
Electrostatic discharge (ESD) is one of the most prevalent threats to the reliability
of electronic components. It is an event in which a finite amount of charge is trans-
ferred from one object (i.e., human body) to another (i.e., microchip). This process
can result in a very high current passing through the microchip within a very short
period of time, and, hence, more than 35% of chip damages can be attributed to an
ESD-related event. As such, designing on-chip ESD structures to protect integrated
circuits against the ESD stresses is a high priority in the semiconductor industry.
數(shù)字化電源的特點：1.控制智能化它是以數(shù)字信號處理器(DSP)或微控制器(MCU)為核心，將數(shù)字電源驅動器及PWM控制器作為控制對象而構成的智能化開關電源系統(tǒng)。傳統(tǒng)的由微控制器控制的開關電源，一般只是控制電源的啟動和關斷，并非真正意義的數(shù)字電源。2.數(shù)模組件組合優(yōu)化采用“整合數(shù)字電源”(Fusion Digital Power)技術，實現(xiàn)了開關電源中模擬組件與數(shù)字組件的優(yōu)化組合。例如，功率級所用的模擬組件MOSFET驅動器，可以很方便地與數(shù)字電源控制器相連并實現(xiàn)各種保護及偏置電源管理，而PWM控制器也屬于數(shù)控模擬芯片。3.集成度高實現(xiàn)了電源系統(tǒng)單片集成化(Power System on Chip)，將大量的分立式元器件整合到一個芯片或一組芯片中。4.控制精度高能充分發(fā)揮數(shù)字信號處理器及微控制器的優(yōu)勢，使所設計的數(shù)字電源達到高技術指標。例如，其脈寬調(diào)制(PWM)分辨力可達150ps(10~12s)的水平，這是傳統(tǒng)開關電源所望塵莫及的。數(shù)字電源還能實現(xiàn)多相位控制、非線性控制、負載均流以及故障預測等功能，為研制綠色節(jié)能型開關電源提供了便利條件。5.模塊化程度高數(shù)字電源模塊化程度高，各模塊之間可以方便地實現(xiàn)有機融合，便于構成分布式數(shù)字電源系統(tǒng)，提高電源系統(tǒng)的可靠性。
數(shù)字示波器功能強大,使用方便,但是價格相對昂貴。本文以Ti的MSP430F5529為主控器,以Altera公司的EP2C5T144C8 FPGA器件為邏輯控制部件設計數(shù)字示波器。模擬信號經(jīng)程控放大、整形電路后形成方波信號送至FPGA測頻,根據(jù)頻率值選擇采用片上及片外高速AD分段采樣。FPGA控制片外AD采樣并將數(shù)據(jù)輸入到FIFO模塊中緩存,由單片機進行頻譜分析。測試表明:簡易示波器可以實現(xiàn)自動選檔、多采樣率采樣、高精度測頻及頻譜分析等功能。Digital oscilloscope is powerful and easy to use, but also expensive. The research group designed a low-cost digital oscilloscope, the chip of MSP430F5529 of TI is chosen as the main controller and the device of EP2C5T144C8 of Altera company is used as the logic control unit. Analog signal enter the programmable amplifier circuit, shaping circuit and other pre-processing circuit. The shaped rectangular wave signal is sent to FPGA for measure the frequency. According to the frequency value to select AD on-chip or off-chip high-speed AD for sampling. FPGA controls the off-chip AD sampling and buffers AD data by FIFO module. The single chip microcomputer receives the data, and do FFT for spectrum analysis. The test shows that the simple oscilloscope can realize automatic gain selection, sampling at different sampling rates, high precision frequency measurement and spectrum analysis.
The GL823K integrates a high speed 8051 microprocessor and a high efficiency hardware engine for the best data transfer performance between USB and flash card interfaces. Its pin assignment design fits to card sockets to provide easier PCB layout. Inside the chip, it integrates 5V to 3.3V regulator, 3.3V to 1.8V regulator and power MOSFETs and it enables the function of on-chip clock source (OCCS) which means no external 12MHz XTAL is needed and that effectively reduces the total BOM cost.
