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射頻集成電路設計John Rogers(Radio Freq

Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.

標簽： Rogers Radio John Freq

上傳時間： 2014-12-23

上傳用戶：han_zh
CN3052A(鋰離子電池充電器)

The CN3052A is a complete constant-current /constant voltage linear charger for single cell Li-ion and Li Polymer rechargeable batteries. The device contains an on-chip power MOSFET and eliminates the need for the external sense resistor and blocking diode.

標簽： 3052A 3052 CN 鋰離子電池

上傳時間： 2013-11-10

上傳用戶：子虛烏有
H.264高清編解碼器的片上系統MG3500

MG3500SoC是支持H.264高清編解碼器的片上系統，內部集成一個嵌入式ARM926處理器，支持高清H.264編解碼、MPEG鄄2解碼和JPEG編解碼。介紹了MG3500SoC的主要性能特點、引腳排列、主要接口功能及在DVR上的應用，以及MG3500SoC及其周圍器件的硬件設計，提出了在設計中應注意的問題。 Abstract: The MG3500System-on-Chip（SoC）is high definition（HD）H.264codec,including ARM926-EJ processor，H.264encoder/decoder，MPEG2decoder and JPEG/MJPEG encoder/decoder.The features,pin assignments，interfaces and the typical application of MG3500in DVR are introduced in this paper.The application hardware circuit between the MG3500SoC and peripheral device are given,the questions which the syetem design needs to pay attention are explained.

標簽： 3500 264 MG 編解碼器

上傳時間： 2013-11-12

上傳用戶：elinuxzj
PCF2116系列LCD驅動器芯片簡介及封裝庫

1 FEATURES· Single chip LCD controller/driver· 1 or 2-line display of up to 24 characters per line, or2 or 4 lines of up to 12 characters per line· 5 ′ 7 character format plus cursor; 5 ′ 8 for kana(Japanese syllabary) and user defined symbols· On-chip:– generation of LCD supply voltage (external supplyalso possible)– generation of intermediate LCD bias voltages– oscillator requires no external components (externalclock also possible)· Display data RAM: 80 characters· Character generator ROM: 240 characters· Character generator RAM: 16 characters· 4 or 8-bit parallel bus or 2-wire I2C-bus interface· CMOS/TTL compatible· 32 row, 60 column outputs· MUX rates 1 : 32 and 1 : 16· Uses common 11 code instruction set· Logic supply voltage range, VDD - VSS: 2.5 to 6 V· Display supply voltage range, VDD - VLCD: 3.5 to 9 V· Low power consumption· I2C-bus address: 011101 SA0.

標簽： 2116 PCF LCD 驅動器芯片

上傳時間： 2013-11-08

上傳用戶：laozhanshi111
CAT93C46 器件數據手冊

The CAT93C46 is a 1 kb Serial EEPROM memory device which isconfigured as either 64 registers of 16 bits (ORG pin at VCC) or 128registers of 8 bits (ORG pin at GND). Each register can be written (orread) serially by using the DI (or DO) pin. The CAT93C46 features aself−timed internal write with auto−clear. On−chip Power−On Resetcircuit protects the internal logic against powering up in the wrongstate.

標簽： CAT 93C C46 93

上傳時間： 2013-11-20

上傳用戶：ynzfm
第1章μPSD3200系列單片機概述

單片機是單片微型計算機（SingleChipMicrocomputer）的簡稱，它的內部包含有計算機的基本功能部件：中央處理器（CPU）、存儲器、定時/計數器、各種串/并行I/O接口電路等。因此，單片機只需要和適當的軟件及外部設備相結合，便可成為一個單片機控制系統。近年來，由于半導體技術和工藝的快速發展，以及針對各行各業的實際應用需要，單片機的開發方面又出現了許多新的技術。SOC（System On Chip，片上系統）等名詞日益被人們所熟悉和關注。

標簽： 3200 PSD 單片機概述

上傳時間： 2013-10-10

上傳用戶：zhang97080564
lpc2478完全使用手冊

NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.

標簽： 2478 lpc 使用手冊

上傳時間： 2013-11-15

上傳用戶：zouxinwang
CAT28LV64-64Kb CMOS并行EEPROM數據手

The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.

標簽： EEPROM 64 CMOS CAT

上傳時間： 2013-11-16

上傳用戶：浩子GG
Clocking Options for Stellaris

The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after theboot process has completed.

標簽： Stellaris Clocking Options for

上傳時間： 2013-10-14

上傳用戶：pol123
Emulating a synchronous serial

The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.

標簽： synchronous Emulating serial

上傳時間： 2014-01-31

上傳用戶：z1191176801