a3load is 8051 firmware that can be used for uploading or downLoading to EZ-USB RAM (internal or external). It implements the vendor specific command bRequest = 0xA3. The address to download/upload to/from is specified in the wValue field of the SETUP packet and the length of the transfer in the wLength field. The actual upload/download data is transferred during the DATA stage of the SETUP transfer. This firmware will function on all EZ-USB chips (EZ-USB, EZ-USB FX, FX2, FX2LP, FX1).
標(biāo)簽： downLoading uploading firmware internal
上傳時(shí)間： 2013-12-25
上傳用戶：zhaiye
Class for downLoading fileStreams from the internet
標(biāo)簽： downLoading fileStreams internet Class
上傳時(shí)間： 2013-12-27
上傳用戶：亞亞娟娟123
hanks for downLoading this code. This VB Project shows you how to make forms with "rounded rectangle" shape. It also shows you how you can reduce the size of your programs with a GUI by using blocks of images and absolutely positioning and stretching them to create a dialog box, rather than making the whole dialog box in a graphics program and setting it as the Picture property of the Form. Another advantage of using image blocks is that you can resize this form to virtually any size and the effect will still be the same.
標(biāo)簽： downLoading rectangle Project rounded
上傳時(shí)間： 2013-12-13
上傳用戶：zhangliming420
GPS Manager is a GUI for downLoading, organizing, maintaining, and uploading GPS data (i.e. tracks, waypoints, and routes) from various GPS units.
標(biāo)簽： i.e. downLoading maintaining organizing
上傳時(shí)間： 2016-05-18
上傳用戶：saharawalker
For downLoading for ARM 7 and ARM 9
標(biāo)簽： downLoading ARM For and
上傳時(shí)間： 2017-05-17
上傳用戶：GHF
本文利用Verilog HDL 語言自頂向下的設(shè)計(jì)方法設(shè)計(jì)多功能數(shù)字鐘，突出了其作為硬件描述語言的良好的可讀性、可移植性和易理解等優(yōu)點(diǎn)，并通過Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成綜合、仿真。此程序通過下載到FPGA 芯片后，可應(yīng)用于實(shí)際的數(shù)字鐘顯示中。 關(guān)鍵詞：Verilog HDL；硬件描述語言；FPGA Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downLoading to the FPGA chip. Keywords: Verilog HDL；hardware description language；FPGA
標(biāo)簽： Verilog HDL 多功能 數(shù)字
上傳時(shí)間： 2013-11-10
上傳用戶：hz07104032
用Ｅｖｃ開發(fā)的一些關(guān)于文件操作的程序?qū)嵗创a，供大家下載參考學(xué)習(xí)- With E v c development some about the document operation procedure example source code, study for everybody downLoading reference
上傳時(shí)間： 2014-01-09
上傳用戶：bruce5996
Tell you some basic things about Linux, if you want to learn this Linux well and can programme in this OS,please don t miss downLoading this document.
標(biāo)簽： Linux you programme things
上傳時(shí)間： 2016-02-19
上傳用戶：kbnswdifs
LiScNLS is a Matlab application for the numerical study of some nonlinear differential equations of the form Lu=Nu, using the Lyapunov-Schmidt method. downLoading the LiScNLS package creates a new LiScNLS folder on the computer.
標(biāo)簽： differential application equations numerical
上傳時(shí)間： 2013-12-21
上傳用戶：hustfanenze
Contents at a Glance Introduction 1 PART I INSTALLATION AND CONFIGURATION 5 Hour 1 Preparing to Install Linux 7 2 Installing Linux 23 3 Post-Installation Issues 41 PART II LEARNING LINUX BASICS 67 Hour 4 Reading and Navigation Commands 69 5 Manipulation and Searching Commands 93 6 Using the Shell 117 7 Using the X Window System 143 8 Exploring the K Desktop Environment 177 PART III CONNECTING TO THE OUTSIDE WORLD 197 Hour 9 Using Communications Programs 199 10 Connecting to the Internet 223 11 Configuring Internet Email 249 12 Configuring Internet News 269 13 Internet downLoading and Browsing 289
標(biāo)簽： CONFIGURATION Introduction INSTALLATION Preparing
上傳時(shí)間： 2013-12-27
上傳用戶：qiao8960
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