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dynamically

  • A data-based tool that can produce questionnaires dynamically which will be used to investigate clie

    A data-based tool that can produce questionnaires dynamically which will be used to investigate client information.

    標簽: questionnaires dynamically investigate data-based

    上傳時間: 2015-09-15

    上傳用戶:csgcd001

  • 16 x 16 LED problem for display use can run dynamically

    16 x 16 LED problem for display use can run dynamically

    標簽: dynamically problem display 16

    上傳時間: 2015-10-30

    上傳用戶:許小華

  • This tutorial will describe how to create a simple device driver, dynamically load and unload it, an

    This tutorial will describe how to create a simple device driver, dynamically load and unload it, and finally talk to it from user mode.

    標簽: dynamically tutorial describe create

    上傳時間: 2014-01-09

    上傳用戶:cxl274287265

  • presents a new particle filter that maintains samples in the state space at dynamically varying reso

    presents a new particle filter that maintains samples in the state space at dynamically varying resolution for computational efficiency

    標簽: dynamically maintains presents particle

    上傳時間: 2016-05-08

    上傳用戶:

  • it is a OFDM and QAM with dynamically X-QAM mdoulation scheme.

    it is a OFDM and QAM with dynamically X-QAM mdoulation scheme.

    標簽: dynamically mdoulation scheme X-QAM

    上傳時間: 2017-03-22

    上傳用戶:GHF

  • 動態可重構FPGA的布局布線算法研究

    可編程邏輯芯片特別是現場可編程門陣列(Field-Programmable Gate Array,FPGA)芯片的快速發展,使得新的芯片能夠根據具體應用動態地調整結構以獲得更好的性能,這類芯片稱為動態可重構FPGA芯片(dynamically ReconfigurableFPGA,DRFPGA)。然而,使用這類芯片構建的可重構系統在實際應用前還有許多問題需要解決。一個基本的問題就是動態可重構FPGA芯片中的可重構功能單元(Reconfigurable Functional Unit,RFU)的模塊布局問題和模塊間的布線問題。 本文從基本的FPGA芯片結構和CAD算法談起,介紹了可重構計算的概念,建立了可重構計算系統模型和動態可重構FPGA芯片模型,在此模型上提出一個基于劃分和時延驅動的在線布局算法,和一個基于Pathfinder協商擁塞算法的布線算法,來解決動態可重構FPGA芯片的布局和布線問題。由硬件描述語言(Hardware Description Language,HDL)描述的電路首先被劃分成有限數目的層,然后將這些電路層布局到芯片的每一層,同時確保關鍵路徑的時延最小。實驗結果表明,布局算法與傳統的布局算法(或者文獻[37]中的算法)相比,在時延上平均減少27%,在線長上平均減少34%(或者11%),在運行時間上平均減少42%(或者97%)。布線算法與傳統的布線算法相比,能夠將線長降低26%,將水平通道寬度降低27%,顯示出較高的性能。

    標簽: FPGA 動態可重構 布局布線 算法研究

    上傳時間: 2013-05-24

    上傳用戶:Neoemily

  • XAPP953-二維列序濾波器的實現

      This application note describes the implementation of a two-dimensional Rank Order filter. Thereference design includes the RTL VHDL implementation of an efficient sorting algorithm. Thedesign is parameterizable for input/output precision, color standards, filter kernel size,maximum horizontal resolution, and implementation options. The rank to be selected can bemodified dynamically, and the actual horizontal resolution is picked up automatically from theinput synchronization signals. The design has a fully synchronous interface through the ce, clk,and rst ports.

    標簽: XAPP 953 二維 濾波器

    上傳時間: 2013-12-14

    上傳用戶:逗逗666

  • jbuzzer is an application written in Java that allows mapping your comuter keyboard to sounds. It su

    jbuzzer is an application written in Java that allows mapping your comuter keyboard to sounds. It supports short samples as well as streaming format. The GUI allows dynamically adding and removing new slots for samples.

    標簽: application keyboard jbuzzer comuter

    上傳時間: 2014-12-07

    上傳用戶:qoovoop

  • Overview In this chapter I introduce Borland C++Builder (BCB) and explain what it is about. I also d

    Overview In this chapter I introduce Borland C++Builder (BCB) and explain what it is about. I also devote considerable time to explaining the purpose of this book and the philosophy behind my approach to technical writing. Technical subjects covered in this chapter include Creating a simple Multimedia RAD program that plays movies, WAV files, and MIDI files. Shutting down the BCB RAD programming tools and writing raw Windows API code instead. Creating components dynamically on the heap at runtime. Setting up event handlers (closures) dynamically at runtime. A brief introduction to using exceptions. This topic is covered in more depth in Chapter 5, "Exceptions." A brief introduction to ANSI strings. This subject is covered in more depth in Chapter 3, "C++Builder and the VCL." Using the online help. Greping through the include and source files that come with the product and with this book.

    標簽: introduce Overview Borland Builder

    上傳時間: 2014-01-04

    上傳用戶:小鵬

  • * This a software code module for a time-of-day clock object. * The clock may be fixed 12-hour, fi

    * This a software code module for a time-of-day clock object. * The clock may be fixed 12-hour, fixed 24-hour, or dynamically * configurable between these two types. Clock data can be accessed * as a binary number representing the number of minutes since midnight * or a BCD number formatted according to the time-of-day description * in the TIME module 0404x. The functions work with time-of-day values * which conform to normally accepted clock values of 1:00 to * 12:59 BCD / 0 to 719 binary for a 12-hour clock or clock values * 00:00 to 23:59 BCD / 0 to 1439 binary for a 24-hour clock. On power-up * the clock is 12:00 BCD / 0 binary for a 12-hour or dynamically * configurable clock, or 00:00 BCD / 0 binary for a 24-hour clock.

    標簽: clock time-of-day software module

    上傳時間: 2013-12-07

    上傳用戶:llandlu

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