xl2tpd is an implementation of the Layer 2 Tunnelling Protocol (RFC 2661). L2TP allows you to tunnel PPP over UDP. Some ISPs use L2TP to tunnel user sessions from dial-in servers (modem banks, ADSL DSLAMs) to back-end PPP servers. Another important application is Virtual Private Networks where the IPsec protocol is used to secure the L2TP connection (L2TP/IPsec, RFC 3193). The L2TP/IPsec protocol is mainly used by Windows and Mac OS X clients. On Linux, xl2tpd can be used in combination with IPsec implementations such as Openswan.
標簽： implementation Tunnelling Protocol xl2tpd
上傳時間： 2014-01-20
上傳用戶：Altman
1. 下列說法正確的是 （ ） A. Java語言不區分大小寫 B. Java程序以類為基本單位 C. JVM為Java虛擬機JVM的英文縮寫 D. 運行Java程序需要先安裝JDK 2. 下列說法中錯誤的是 ( ) A. Java語言是編譯執行的 B. Java中使用了多進程技術 C. Java的單行注視以//開頭 D. Java語言具有很高的安全性 3. 下面不屬于Java語言特點的一項是( ) A. 安全性 B. 分布式 C. 移植性 D. 編譯執行 4. 下列語句中，正確的項是 ( ) A . int $e,a,b=10 B. char c,d=’a’ C. float e=0.0d D. double c=0.0f
上傳時間： 2017-01-04
上傳用戶：netwolf
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2013-10-15
上傳用戶：busterman
Abstract: A resistive feedback network is often used to set the output voltage of a power supply. A mechanical potentiometer (pot)conveniently solves the problem of adjusting a power supply. For easier automatic calibration, a mechanical pot can be replaced witha digital pot. This application note presents a calibration solution that uses a digital pot, because digipots are smaller, do not movewith age or vibration, and can be recalibrated remotely. This proposed solution reduces the susceptibility of the system to thetolerance of the digital pot's end-to-end resistance, making the solution optimal fordesigners. This application note also explainssome of the equations required to calculate the resistor chain values and to use a digital pot in this way. A spreadsheet withstandard reisistor values is available for easy calculations.
上傳時間： 2013-10-31
上傳用戶：caiguoqing
在理論分析循環碼編碼和譯碼基本原理的基礎上，提出了基于單片機系統的(24，16)循環碼軟件實現編碼、譯碼的方案。仿真結果表明(24，16)循環碼能有效地克服來自通訊信道的干擾，保證數據通信的可靠及系統的穩定，使誤碼率大幅度降低。本論文對(24，16)循環碼的研究結果表明，可以有效地降低錯誤概率和提高系統的吞吐量，實現糾錯僅需要在接收端增加有限的存儲空間和計算復雜度，具有一定的實用價值。 Abstract: Based on analyzing the theory of encoding and decoding of cyclic code， this paper showed the schemes of encoding and decoding of(24，16)cyclic code by the software and based on microcontroller. Simulation results show that using (24，16) cyclic codes can effectively overcome the interference from communication channel， ensure the reliability and stability of data communication systems， and reduce the bit error rate greatly. The results of this paper show that by using the (24，16) cyclic code， the error rate can be reduced and the system throughput can be improved. Meanwhile， the system only needs to enlarge limited storage space and computation the complexity at the receiving end to realize error correction. Thus the (24，16) cyclic code has a practical value.
上傳時間： 2013-11-09
上傳用戶：gaoliangncepu
Deliver more functionality to the end-user sooner and more cost-effectively
標簽： Speech_Lifeng Welcome ARM
上傳時間： 2014-01-13
上傳用戶：lifangyuan12
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
3GPP文件格式標準，英文版。 3rd Generation Partnership Project Technical Specification Group Services and System Aspects Transparent end-to-end packet switched streaming service (PSS) 3GPP file format (3GP) (Release 6)
上傳時間： 2013-12-10
上傳用戶：Avoid98
TIMER.ASM ********* [ milindhp@tifrvax.tifr.res.in ] Set Processor configuration word as = 0000 0000 1010 b. a] -MCLR tied to VDD (internally). b] Code protection off. c] WDT disabled. d] Internal RC oscillator [4 MHZ].
標簽： configuration Processor milindhp tifrvax
上傳時間： 2015-05-24
上傳用戶：wqxstar
圖形顯示技巧,這是其中一段代碼 procedure TForm1.Button1Click(Sender: TObject) var newbmp:TBitmap i,bmpheight,bmpwidth:integer //推拉 begin newbmp:=TBitmap.Create newbmp.Width:=image1.Width newbmp.Height:=image1.Height bmpheight:=image1.Height bmpwidth:=image1.Width for i:=0 to bmpheight do begin newbmp.Canvas.CopyRect(Rect(0,bmpheight-i,bmpwidth,bmpheight),image1.Canvas,Rect(0,0,bmpwidth,i)) form1.Canvas.Draw(120,100,newbmp) end newbmp.free end
標簽： procedure TBitmap TObject Button
上傳時間： 2016-01-18
上傳用戶：comua
