3GPP文件格式標準，英文版。
3rd Generation Partnership Project
Technical Specification Group Services and System Aspects Transparent end-to-end
packet switched streaming service (PSS)
3GPP file format (3GP)
(Release 6)
數字運算，判斷一個數是否接近素數
A Niven number is a number such that the sum of its digits divides itself. For example, 111 is a Niven number because the sum of its digits is 3, which divides 111. We can also specify a number in another base b, and a number in base b is a Niven number if the sum of its digits divides its value.
Given b (2 <= b <= 10) and a number in base b, determine whether it is a Niven number or not.
Input
Each line of input contains the base b, followed by a string of digits representing a positive integer in that base. There are no leading zeroes. The input is terminated by a line consisting of 0 alone.
Output
For each case, print "yes" on a line if the given number is a Niven number, and "no" otherwise.
Sample Input
10 111
2 110
10 123
6 1000
8 2314
0
Sample Output
yes
yes
no
yes
no
The present paper deals with the problem of calculating mean delays in polling systems
with either exhaustive or gated service. We develop a mean value analysis (MVA) to
compute these delay figures. The merits of MVA are in its intrinsic simplicity and its
intuitively appealing derivation. As a consequence, MVA may be applied, both in an
exact and approximate manner, to a large variety of models.
pashload是應用在linux下的網絡帶寬測試源程序精確度比較高
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Pathload is a tool for estimating the available bandwidth
of an end-to-end path from a host S (sender) to a host R (receiver).
The available bandwidth is the maximum IP-layer
throughput that a flow can get in the path from S to R,
without reducing the rate of the rest of the traffic in the path.
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
