高斯脈沖的峰值頻率。把各階導(dǎo)函數(shù)的esd作為α的函數(shù)，確定其峰值頻率的數(shù)值。
上傳時(shí)間： 2014-01-08
上傳用戶：ljmwh2000
電子工藝,質(zhì)量及可靠性相關(guān)專輯 80冊(cè) 902Mesd電路與器件 34頁(yè) 8.6M.pdf
標(biāo)簽：
上傳時(shí)間： 2014-05-05
上傳用戶：時(shí)代將軍
電子企業(yè)工程師esd培訓(xùn)材料，用于電子企業(yè)的靜電保護(hù)
標(biāo)簽： esd
上傳時(shí)間： 2015-06-08
上傳用戶：ttkkkk
esd資料信息詳細(xì)內(nèi)容，分享0000000000
上傳時(shí)間： 2016-05-16
上傳用戶：desay
esd管理流程esd管理流程esd管理流程esd管理流程
上傳時(shí)間： 2016-05-16
上傳用戶：desay
This effort started as an answer to the numerous questions the authors have repeatedly had to answer about electrostatic discharge (esd) protection and input/output (1/0) designs. In the past no comprehensive book existed suffi- ciently covering these areas, and these topics were rarely taught in engineering schools. Thus first-time I/O and esd protection designers have had consider- able trouble getting started. This book is in part an answer to such needs.
標(biāo)簽： Design Basic esd and IO
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
Contamination and electrostatic discharge (esd) are now becoming recognized as factors affecting yield and reliability in an ever-increasing number of industries. Whereas contam- ination traditionally was recognized as affecting the semiconductor, disk drive, aerospace, pharmaceutical, and medical device industries, today such industries as automobile and food production are also discovering the benefits of contamination control. esd control has experienced a similar growth in applications.
標(biāo)簽： Contamination Control and esd
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
Electrostatic discharge (esd) phenomena have been known to mankind since the Greek Empire when Thales of Miletus, one of the Seven Sages of Greece, noticed the attraction of strands of hay to amber, leading to the coining of the word ‘‘electron.’’ In the 17th century, Gilbert and Cabeo addressed the attractive and repulsive nature of electricity. In the 18th century, a rapid increase of interest occurred for scientists in the understanding of electrical physics—Gray, du Fay, Nollet, Musschenbroeck, Franklin, Watson, Aepinus, Canton,
標(biāo)簽： Circuits Devices esd and
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
Failure analysis is invaluable in the learning process of electrostatic discharge (esd) and electrical overstress (EOS) protection design and development [1–8]. In the failure analysis of EOS, esd, and latchup events, there are a number of unique failure analysis processes andinformationthatcanprovidesignificantunderstandingandillumination[4].Today,thereis still no design methodology or computer-aided design (CAD) tool which will predict EOS, esdprotectionlevels,andlatchupinasemiconductorchip;thisisoneofthesignificantreasons why failure analysis is critical to the esd design discipline.
標(biāo)簽： Mechanisms Failure Models esd and
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
Electrostatic discharge (esd) phenomena have been known to mankind since Thales of Miletus in approximately 600 B.C.E. noticed the attraction of strands of hay to amber. Two thousand six hundred years have passed and the quest to obtain a better under- standing of electrostatics and esd phenomenon continues. Today, the manufacturing of microelectronics has continued the interest in the field of electrostatic phenomenon spanning factory issues, tooling, materials, and the microelectronic industry
標(biāo)簽： Devices Physics esd and
上傳時(shí)間： 2020-06-05
上傳用戶：shancjb
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