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  • DN436微型全橋壓電馬達(dá)驅(qū)動(dòng)器

      Piezoelectric motors are used in digital cameras for autofocus,zooming and optical image stabilization. Theyare relatively small, lightweight and effi cient, but theyalso require a complicated driving scheme. Traditionally,this challenge has been met with the use ofseparatecircuits, including a step-up converter and an oversizedgeneric full-bridge drive IC. The resulting high componentcount and large board space are especially problematicin the design of cameras for ever shrinking cell phones.The LT®3572 solves these problems by combining astep-up regulator and a dual full-bridge driver in a 4mm× 4mm QFN package. figure 1 shows a typical LT3572Piezo motor drive circuit. A step-up converter is usedto generate 30V from a low voltage power source suchas a Li-Ion battery or any input power source within thepart’s wide input voltage range of 2.7V to 10V. The highoutput voltage of the step-up converter, adjustable upto 40V, is available for the drivers at the VOUT pin. Thedrivers operate in a full-bridge fashion, where the OUTAand OUTB pins are the same polarity as the PWMA andPWMB pins, respectively, and the OUTA and OUTB pinsare inverted from PWMA and PWMB, respectively. Thestep-up converter and both Piezo drivers have their ownshutdown control. figure 2 shows a typical layout

    標(biāo)簽: 436 DN 全橋 壓電

    上傳時(shí)間: 2013-11-18

    上傳用戶:hulee

  • 雪崩光電二極管的偏置電壓和電流檢測電路

      Avalanche photodiodes (APDs) are widely utilized in laserbased fiberoptic systems to convert optical data intoelectrical form. The APD is usually packaged with a signalconditioning amplifier in a small module. An APD receivermodule and attendant circuitry appears in figure 1. TheAPD module (figure right) contains the APD and a transimpedance(e.g., current-to-voltage) amplifier. An opticalport permits interfacing fiberoptic cable to the APD’sphotosensitive portion. The module’s compact constructionfacilitates a direct, low loss connection between theAPD and the amplifier, necessary because of the extremelyhigh speed data rates involved

    標(biāo)簽: 雪崩 光電二極管 偏置電壓 電流檢測電路

    上傳時(shí)間: 2013-10-25

    上傳用戶:brain kung

  • 開關(guān)穩(wěn)壓器的偏置低噪聲變?nèi)?/a>

      Telecommunication, satellite links and set-top boxes allrequire tuning a high frequency oscillator. The actualtuning element is a varactor diode, a 2-terminal device thatchanges capacitance as a function of reverse bias voltage.1 The oscillator is part of a frequency synthesizingloop, as detailed in figure 1. A phase locked loop (PLL)compares a divided down representation of the oscillatorwith a frequency reference. The PLL’s output is levelshifted to provide the high voltage necessary to bias thevaractor, which closes a feedback loop by voltage tuningthe oscillator. This loop forces the voltage controlledoscillator (VCO) to operate at a frequency determined bythe frequency reference and the divider’s division ratio.

    標(biāo)簽: 開關(guān)穩(wěn)壓器 低噪聲 上傳時(shí)間: 2013-12-20

    上傳用戶:ABCDE

  • OPTI-LOOP架構(gòu)降低輸出電容和改善瞬態(tài)響應(yīng)

      Removing output capacitors saves money and boardspace. Linear Technology’s OPTI-LOOPTM architectureallows you to use the output capacitors of your choice andcompensate the control loop for optimum transientresponse and loop stability. figure 1 shows the dramaticimprovement possible with the OPTI-LOOP architecture.With the improvement shown in figure 1, less capacitance

    標(biāo)簽: OPTI-LOOP 架構(gòu) 輸出電容 瞬態(tài)響應(yīng)

    上傳時(shí)間: 2013-12-15

    上傳用戶:fanboynet

  • LTC1325電池管理IC的使用

      For a variety of reasons, it is desirable to charge batteriesas rapidly as possible. At the same time, overchargingmust be limited to prolong battery life. Such limitation ofovercharging depends on factors such as the choice ofcharge termination technique and the use of multi-rate/multi-stage charging schemes. The majority of batterycharger ICs available today lock the user into one fixedcharging regimen, with at best a limited number ofcustomization options to suit a variety of application needsor battery types. The LTC®1325 addresses these shortcomingsby providing the user with all the functionalblocks needed to implement a simple but highly flexiblebattery charger (see figure 1) which not only addressesthe issue of charging batteries but also those of batteryconditioning and capacity monitoring.

    標(biāo)簽: 1325 LTC IC的 電池管理

    上傳時(shí)間: 2013-10-19

    上傳用戶:royzhangsz

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.

    標(biāo)簽: Bridge Memory Contr MPC

    上傳時(shí)間: 2013-10-08

    上傳用戶:18711024007

  • 87C576微控制器的在線編程

    The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.

    標(biāo)簽: 87C576 微控制器 編程

    上傳時(shí)間: 2013-10-21

    上傳用戶:xiaozhiqban

  • 3.3v看門狗芯片

    The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.

    標(biāo)簽: 3.3 看門狗 芯片

    上傳時(shí)間: 2013-10-22

    上傳用戶:taiyang250072

  • 采用TüV認(rèn)證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖figure 1. Local Safety System

    標(biāo)簽: FPGA 安全系統(tǒng)

    上傳時(shí)間: 2013-11-05

    上傳用戶:維子哥哥

  • 采用TüV認(rèn)證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖figure 1. Local Safety System

    標(biāo)簽: FPGA 安全系統(tǒng)

    上傳時(shí)間: 2013-11-14

    上傳用戶:zoudejile

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