library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity counter is Port ( clk : in std_logic; resetn : in std_logic; dout : out std_logic_vector(7 downto 0); lcd_en : out std_logic; lcd_rs : out std_logic; lcd_rw : out std_logic); end counter;
上傳時間： 2013-10-30
上傳用戶：wqxstar
Nios II軟件構建工具入門 The Nios® II Software Build Tools (SBT) allows you to construct a wide variety of complex embedded software systems using a command-line interface. From this interface, you can execute Software Built Tools command utilities, and use scripts other tools) to combine the command utilities in many useful ways. This chapter introduces you to project creation with the SBT at the command line This chapter includes the following sections: ■ “Advantages of Command-Line Software Development” ■ “Outline of the Nios II SBT Command-Line Interface” ■ “Getting Started in the SBT Command Line” ■ “Software Build Tools Scripting Basics” on page 3–8
上傳時間： 2013-11-15
上傳用戶：nanxia
使用Nios II軟件構建工具 This chapter describes the Nios® II Software Build Tools (SBT), a set of utilities and scripts that creates and builds embedded C/C++ application projects, user library projects, and board support packages (BSPs). The Nios II SBT supports a repeatable, scriptable, and archivable process for creating your software product. You can invoke the Nios II SBT through either of the following user interfaces: ■ The Eclipse™ GUI ■ The Nios II Command Shell The purpose of this chapter is to make you familiar with the internal functionality of the Nios II SBT, independent of the user interface employed.
上傳時間： 2013-10-12
上傳用戶：china97wan
Nios II 軟件開發人員手冊中的緩存和緊耦合存儲器部分 Nios® II embedded processor cores can contain instruction and data caches. This chapter discusses cache-related issues that you need to consider to guarantee that your program executes correctly on the Nios II processor. Fortunately, most software based on the Nios II hardware abstraction layer (HAL) works correctly without any special accommodations for caches. However, some software must manage the cache directly. For code that needs direct control over the cache, the Nios II architecture provides facilities to perform the following actions:
上傳時間： 2013-10-25
上傳用戶：蟲蟲蟲蟲蟲蟲
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽： Transceiver Virtex Wizar GTP
上傳時間： 2013-10-20
上傳用戶：dave520l
ZBT SRAM控制器參考設計,xilinx提供VHDL代碼 Description: Contains the following files readme.txt appnote_zbtp.vhd appnote_zbtf.vhd appnote_zbt.ucf Platform: All Installation/Use: Use 'unzip' on the .zip file and 'gunzip' followed by 'tar -xvf' on the .tar.gz file.
上傳時間： 2013-10-25
上傳用戶：peterli123456
UART 4 UART參考設計，Xilinx提供VHDL代碼 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
上傳時間： 2013-11-02
上傳用戶：18862121743
本課題選用光電傳感器作為導向傳感器，以設計出使用方便、價格低廉、引導精確、響應速度快的AGV工廠自動運貨車為研究目的。 AGV是自動導引運輸車（Automated Guided Vehicle）的英文縮寫，是當今柔性制造系統(FMS)和自動化倉儲系統中物流運輸的有效手段。自動導引運輸車系統的核心設備是自動導引運輸車，作為一種無人駕駛工業搬運車輛，一般用蓄電池作為動力，載重量從幾公斤到上百噸，工作場地可以是辦公室、車間，也可以是港口、碼頭。 現代的AGV都是由計算機控制的，車上裝有微處理器。多數的AGVS配有系統集中控制與管理計算機，用于對AGV的作業過程進行優化，發出搬運指令，跟蹤傳送中的構件。裝備有電磁或光學等自動導引裝置，能夠沿規定的導引路徑行駛，具有安全保護以及各種移載功能的運輸車，工業應用中不需駕駛員的搬運車，以可充電之蓄電池為其動力來源。一般可透過電腦來控制其行進路線以及行為，或利用電磁軌道(electromagnetic path-following system)來設立其行進路線，電磁軌道黏貼於地板上，自動導引運輸車則依循電磁軌道所帶來的訊息進行移動與動作。 AGV以輪式移動為特征，較之步行、爬行或其它非輪式的移動機器人具有行動快捷、工作效率高、結構簡單、可控性強、安全性好等優勢。與物料輸送中常用的其他設備相比，AGV的活動區域無需鋪設軌道、支座架等固定裝置，不受場地、道路和空間的限制。因此，在自動化物流系統中，最能充分地體現其自動性和柔性，實現高效、經濟、靈活的無人化生產。 AGV的常用引導方式有電磁感應式引導，激光引導，電磁陀螺式引導等，通過對這種引導方式的比較，我們選用光電傳感器作為導向傳感器，因為光電檢測方法具有精度高、反應快、非接觸等優點，而且可測參數多，傳感器的結構簡單，形式靈活多樣。選用紅外傳感器作為蔽障傳感器，因為紅外線對外界環境光線的適應能力比較強。用直流測速發電機作為速度傳感器。設計出使用方便、價格低廉、引導精確、響應速度快的AGV。
上傳時間： 2015-01-02
上傳用戶：LANCE
MemCheck Driver Memory Tool The MemCheck code is designed to provide Windows NT/2K/XP driver developers with a tool to help in the detection of the following memory handling issues: Buffer overrun Buffer corruption Buffer use after buffer release Double buffer releases
標簽： MemCheck designed Windows develop
上傳時間： 2014-12-05
上傳用戶：weiwolkt
cp210x非標波特率設置工具 CP210x Baud Rate Configuration Utility v1.0 Release Notes Copyright (C) 2004 Silicon Laboratories, Inc. This release contains the following components: * CP210xBaudRateAliasConfig.exe * CP210xManufacturing.DLL * CP210xBaudRateAliasConfig VC++ project * REL_NOTES.TXT (this file)
標簽： 210x Configuration 210 Copyright
上傳時間： 2014-01-24
上傳用戶：362279997
